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117 Commits
Author SHA1 Message Date
Hans-Kristian Arntzen 1a449b3e22 Handle PatchVertices builtin. 2025-08-12 16:14:14 +02:00
Krzysztof Bogacki dcd6c59498 Add support for NvRtGetClusterID. 2025-07-28 14:33:04 +02:00
Georg Lehmann bb2e12f4d8 Vectorize fp16->fp8 conversion. 
nir_opt_vectorize isn't good enough to do this on its own.
 2025-07-01 18:00:33 +02:00
Georg Lehmann 0374e31fe7 Don't use 8bit math to convert fp16 to fp8 
16bit is easier to vectorize for RADV.
 2025-07-01 15:08:58 +02:00
Hans-Kristian Arntzen 9273253295 Rethink FP8 WMMA emulation. 
Convert on load-store. Keep FP16 for intra-shader conversions.
 2025-06-24 14:13:44 +02:00
Hans-Kristian Arntzen 4ddc5c7d12 Add support for SPV_EXT_float8 and NV_cooperative_matrix2. 2025-06-18 14:35:15 +02:00
Hans-Kristian Arntzen 1bf7d40795 Make FP8 hacks a runtime config thing. 2025-05-02 14:12:38 +02:00
Hans-Kristian Arntzen 61a99d7825 Implement support for VkMM. 
Don't enable globally for now.
 2025-04-28 13:54:51 +02:00
Hans-Kristian Arntzen ed1048a99e Experiment with eliminating transpose for C <-> B 8-bit. 2025-04-15 11:06:45 +02:00
Hans-Kristian Arntzen c95c464d0e Clamp FP32 before converting to FP8. 
Impl should probably ensure it doesn't saturate to nan.
 2025-04-10 13:23:52 +02:00
Hans-Kristian Arntzen 50c5e0b79b Implement AGS WMMA enough to compile FSR4 shaders. 2025-04-07 18:23:31 +02:00
Hans-Kristian Arntzen 0e231c6a52 Attempt to auto-insert subgroup barriers in certain cases. 
Some shaders seem to assume that wave32 shaders run in lock-step.
This is not really the case, but we can insert subgroup barriers on
demand.
 2025-03-24 15:28:10 +01:00
Hans-Kristian Arntzen 8923cb5778 Implement BDA expect-assume instrumentation. 
A quite complicated validation, but it implements a probabilistic BDA
validation based on a Bloom Filter. Implementation details will be
documented in vkd3d-proton.
 2025-03-20 14:02:54 +01:00
Hans-Kristian Arntzen 2ffb3d2ceb Add extended robustness for more annoying cases. 
- Constant LUTs.
- alloca(). Native drivers always do this, so we need to follow suit.
- Groupshared is TODO, and native drivers don't do more than VK drivers
  already do, the main annoyance is adding masked ops for all the
  atomics.
 2025-03-10 11:07:20 +01:00
Hans-Kristian Arntzen 182ad34223 Implement robust WaveReadLaneFirst. 
Undocumented behavior :(
 2025-02-27 18:28:21 +01:00
Hans-Kristian Arntzen 8b53c6b4fc Ensure the final expect-assume barrier goes through before returning. 2025-02-27 14:43:02 +01:00
Hans-Kristian Arntzen 1b0593c56a Use proper type for LSB for WaveReadFirstLane. 
Somehow didn't trigger in any other shader ...
 2025-02-26 15:26:27 +01:00
Hans-Kristian Arntzen 3b1ee0d9a2 Add expect assume instrumentation for quad uniform CFG. 2025-02-19 12:48:18 +01:00
Hans-Kristian Arntzen 3cc4a2c7b5 Sink use of dynamically indexed descriptors. 
This attempts to be a workaround for some very strange behavior in some
games that seem to assume that the compiler is sinking invalid bindless
access for them.
 2025-02-05 19:27:25 +01:00
Hans-Kristian Arntzen f9bad0bb18 Add ExpectAssume instrumentation. 2025-01-27 13:41:36 +01:00
Hans-Kristian Arntzen 6225687d04 Rewrite node allocation to not explode with many nodes in the graph. 2025-01-13 15:41:25 +01:00
Hans-Kristian Arntzen a87f97059a Add instrumentation for replacing all NaNs with 0. 2024-12-03 15:02:40 +01:00
Hans-Kristian Arntzen 37db786c70 Rethink how broadcast nodes work. 
For very large NodeMaxDispatchGrid (as seen in AMD's SimpleClassify
sample), we cannot naively just rely on dispatching huge numbers of tiny
workgroups.
 2024-10-04 12:43:11 +02:00
Hans-Kristian Arntzen c4ebe45cc5 Implement workgraph emulation path and experimentally expose it. 2024-09-30 17:29:05 +02:00
Hans-Kristian Arntzen 468367a0ee Add NaN/Inf instrumentation. 2024-09-24 13:26:28 +02:00
Hans-Kristian Arntzen ab3c878812 Add pseudo-op for lifetime stop instead. 2024-09-24 13:26:28 +02:00
Hans-Kristian Arntzen a7641ebff4 Ensure correct block is used as build point when inserting Undefs. 
When building complicated TESC or ROV shaders, we may have to insert
Undef PHIs.
 2024-05-08 11:37:35 +02:00
Hans-Kristian Arntzen a67f025b9f Early return in mesh shaders if exporting 0 verts or prims. 2024-02-14 19:00:03 +01:00
Hans-Kristian Arntzen 034f95a28f Add support for conditional return in SPIR-V codegen. 
This gets tricky because we have to handle PHI and we can get
conditional return in a loop header, which necessitates some reordering
of operations.
 2024-02-14 18:20:56 +01:00
Hans-Kristian Arntzen fd5b5e3c51 Add options for forced branch control. 
Will be expanded with metadata-driven control as well.
 2023-11-03 13:11:40 +01:00
Hans-Kristian Arntzen e4e63bfe4e Add sampler feedback test and implement nonuniform. 2023-10-19 12:23:49 +02:00
Hans-Kristian Arntzen 6262d6e815 Implement wave compacted atomic. 2023-10-19 12:22:12 +02:00
Hans-Kristian Arntzen ddd77feb57 Do not consider continue branches to be fallthroughs in switches. 
We can mostly ignore these branches for purposes of analyzing
fallthrough.
 2023-10-05 16:29:24 +02:00
Hans-Kristian Arntzen 1cf732e1f9 Use LSB + (wave uniform) Shuffle for WaveReadLaneFirstMasked. 
More robust and just as fast on AMD anyways.
Should help NV robustness a lot.
 2023-08-10 17:36:52 +02:00
Hans-Kristian Arntzen 673fbb1d48 Implement strict SM 6.0 wave ops. 
The default assumption in HLSL is that helper lanes do not participate
in wave ops. This implements an opt-in strict path unless
WaveOpsIncludeHelperLanes attribute is added.
 2023-06-16 15:05:16 +02:00
Hans-Kristian Arntzen 7adc87d4de Implement SM 6.7 QuadAny/All. 2023-06-08 18:14:08 +02:00
Hans-Kristian Arntzen 64c22140d4 Fix CFG validation error after last SPIRV-Tools. 2023-02-14 13:12:50 +01:00
Hans-Kristian Arntzen 8727217830 Emit SPIR-V 1.4 for fragment shader if stage input can be overridden. 
We might have to emit PerPrimitiveEXT which requires 1.4.
 2022-11-08 14:46:08 +01:00
Hans-Kristian Arntzen 51a0ddcbed Treat OpEmitMeshTasksEXT as a terminator. 2022-09-05 14:05:13 +02:00
Hans-Kristian Arntzen 0088c22c4e Update SPIRV-Tools submodule. 
Fixes a validation issue where we have to emit Flat for more builtins.
 2022-09-02 12:36:07 +02:00
Hans-Kristian Arntzen 9a8bf01e95 Minor style nits from review. 2022-09-02 12:08:48 +02:00
Philip Rebohle 6cbdb13df3 Use SPIR-V 1.4 for mesh and amplification shaders. 2022-09-02 11:42:43 +02:00
Hans-Kristian Arntzen 07022b75c3 Implement robust BDA UAV counter updates. 
If VA is 0, return 0. Matches native drivers.
 2022-06-30 17:57:52 +02:00
Hans-Kristian Arntzen 6494f5fed8 Add option for robust physical CBV access. 
Does robustness as-if 64 KiB descriptors were used.
Seems to more closely match native behavior.
 2022-06-02 15:58:15 +02:00
Hans-Kristian Arntzen 677148ed11 Extend usage of relaxed precision. 
Attempt to extend use of relaxed precision to variable storage and
arithmetic as well.
 2022-05-31 11:42:30 +02:00
Hans-Kristian Arntzen 9ababf2e2e Relicense to MIT. 2022-05-18 19:27:56 +02:00
Hans-Kristian Arntzen c54fb6b208 Handle infinite loops when emitting SPIR-V. 2022-04-28 12:49:34 +02:00
Hans-Kristian Arntzen 28930a3bba Consider impossible fallthrough scenarios with default blocks as well. 
We only checked cases, but default block is also block like any other.
Refactor default blocks to be just a normal case label.
 2022-04-07 17:13:16 +02:00
Hans-Kristian Arntzen 5ef14cfccf Add check for block being control dependent or not. 2021-11-17 18:32:52 +01:00
Hans-Kristian Arntzen 2a9e52864c Implement SM 6.5 WaveMultiPrefix operations. 2021-07-29 17:24:35 +02:00