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https://github.com/CTCaer/RetroArch.git
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Fix x86_cpuid to preserve ebx for PIC.
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312a81a663
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@ -105,14 +105,24 @@ rarch_perf_tick_t rarch_get_perf_counter(void)
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#ifdef CPU_X86
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static void x86_cpuid(int func, int flags[4])
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{
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#if defined(__GNUC__) && !defined(ANDROID)
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/* doesn't compile on x86 Android -
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* error - inconsistent operand constraints in an 'asm' */
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asm volatile("cpuid\n" :
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"=a"(flags[0]),
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"=b"(flags[1]),
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"=c"(flags[2]),
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"=d"(flags[3]) : "a"(func));
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// On Android, we compile RetroArch with PIC, and we are not allowed to clobber the ebx
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// register.
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#ifdef __x86_64__
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#define REG_b "rbx"
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#define REG_S "rsi"
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#else
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#define REG_b "ebx"
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#define REG_S "esi"
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#endif
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#if defined(__GNUC__)
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asm volatile (
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"mov %%"REG_b", %%"REG_S"\n"
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"cpuid\n"
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"xchg %%"REG_b", %%"REG_S"\n"
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: "=a"(flags[0]), "=S"(flags[1]), "=c"(flags[2]), "=d"(flags[3])
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: "a"(func));
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#elif defined(_MSC_VER)
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__cpuid(flags, func);
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#endif
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@ -123,11 +133,7 @@ void rarch_get_cpu_features(struct rarch_cpu_features *cpu)
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{
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memset(cpu, 0, sizeof(*cpu));
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#if defined(ANDROID)
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uint64_t cpu_flags = android_getCpuFeatures();
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#endif
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#if defined(CPU_X86) && !defined(ANDROID)
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#if defined(CPU_X86)
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int flags[4];
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x86_cpuid(0, flags);
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@ -149,13 +155,9 @@ void rarch_get_cpu_features(struct rarch_cpu_features *cpu)
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RARCH_LOG("[CPUID]: SSE: %d\n", cpu->sse);
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RARCH_LOG("[CPUID]: SSE2: %d\n", cpu->sse2);
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RARCH_LOG("[CPUID]: AVX: %d\n", cpu->avx);
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#endif
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#if defined(ANDROID_ARM)
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#elif defined(ANDROID) && defined(ANDROID_ARM)
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uint64_t cpu_flags = android_getCpuFeatures();
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cpu->neon = (cpu_flags & ANDROID_CPU_ARM_FEATURE_NEON);
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RARCH_LOG("[CPUID]: NEON: %d\n", cpu->neon);
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#elif defined(ANDROID_X86) && defined(HAVE_SSSE3)
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cpu->ssse3 = (cpu_flags & ANDROID_CPU_X86_FEATURE_SSSE3);
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RARCH_LOG("[CPUID]: SSSE3: %d\n", cpu->ssse3);
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#endif
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}
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@ -44,7 +44,6 @@ struct rarch_cpu_features
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{
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bool sse;
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bool sse2;
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bool ssse3;
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bool vmx;
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bool avx;
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bool neon;
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20
retroarch.c
20
retroarch.c
@ -2546,20 +2546,22 @@ static void validate_cpu_features(void)
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struct rarch_cpu_features cpu;
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rarch_get_cpu_features(&cpu);
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#define FAIL_CPU(simd_type) do { \
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RARCH_ERR(simd_type " code is compiled in, but CPU does not support this feature. Cannot continue.\n"); \
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rarch_fail(1, "validate_cpu_features()"); \
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} while(0)
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#ifdef __SSE__
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if (!cpu.sse)
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FAIL_CPU("SSE");
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#endif
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#ifdef __SSE2__
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if (!cpu.sse2)
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{
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RARCH_ERR("SSE2 code is compiled in, but CPU does not support this feature. Cannot continue.\n");
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rarch_fail(1, "validate_cpu_features()");
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}
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FAIL_CPU("SSE2");
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#endif
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#ifdef __AVX__
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if (!cpu.avx)
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{
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RARCH_ERR("AVX code is compiled in, but CPU does not support this feature. Cannot continue.\n");
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rarch_fail(1, "validate_cpu_features()");
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}
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FAIL_CPU("AVX");
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#endif
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}
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