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Fix x86_cpuid to preserve ebx for PIC.

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This commit is contained in:
Themaister 2012-11-02 21:25:54 +01:00
parent 312a81a663
commit 6ce23c57df
3 changed files with 32 additions and 29 deletions
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40
performance.c
View File

@ -105,14 +105,24 @@ rarch_perf_tick_t rarch_get_perf_counter(void)
#ifdef CPU_X86 #ifdef CPU_X86
static void x86_cpuid(int func, int flags[4]) static void x86_cpuid(int func, int flags[4])
{ {
#if defined(__GNUC__) && !defined(ANDROID) // On Android, we compile RetroArch with PIC, and we are not allowed to clobber the ebx
/* doesn't compile on x86 Android - // register.
* error - inconsistent operand constraints in an 'asm' */ #ifdef __x86_64__
asm volatile("cpuid\n" : #define REG_b "rbx"
"=a"(flags[0]), #define REG_S "rsi"
"=b"(flags[1]), #else
"=c"(flags[2]), #define REG_b "ebx"
"=d"(flags[3]) : "a"(func)); #define REG_S "esi"
#endif
#if defined(__GNUC__)
asm volatile (
"mov %%"REG_b", %%"REG_S"\n"
"cpuid\n"
"xchg %%"REG_b", %%"REG_S"\n"
: "=a"(flags[0]), "=S"(flags[1]), "=c"(flags[2]), "=d"(flags[3])
: "a"(func));
#elif defined(_MSC_VER) #elif defined(_MSC_VER)
__cpuid(flags, func); __cpuid(flags, func);
#endif #endif
@ -123,11 +133,7 @@ void rarch_get_cpu_features(struct rarch_cpu_features *cpu)
{ {
memset(cpu, 0, sizeof(*cpu)); memset(cpu, 0, sizeof(*cpu));
#if defined(ANDROID) #if defined(CPU_X86)
uint64_t cpu_flags = android_getCpuFeatures();
#endif
#if defined(CPU_X86) && !defined(ANDROID)
int flags[4]; int flags[4];
x86_cpuid(0, flags); x86_cpuid(0, flags);
@ -149,13 +155,9 @@ void rarch_get_cpu_features(struct rarch_cpu_features *cpu)
RARCH_LOG("[CPUID]: SSE: %d\n", cpu->sse); RARCH_LOG("[CPUID]: SSE: %d\n", cpu->sse);
RARCH_LOG("[CPUID]: SSE2: %d\n", cpu->sse2); RARCH_LOG("[CPUID]: SSE2: %d\n", cpu->sse2);
RARCH_LOG("[CPUID]: AVX: %d\n", cpu->avx); RARCH_LOG("[CPUID]: AVX: %d\n", cpu->avx);
#endif #elif defined(ANDROID) && defined(ANDROID_ARM)
uint64_t cpu_flags = android_getCpuFeatures();
#if defined(ANDROID_ARM)
cpu->neon = (cpu_flags & ANDROID_CPU_ARM_FEATURE_NEON); cpu->neon = (cpu_flags & ANDROID_CPU_ARM_FEATURE_NEON);
RARCH_LOG("[CPUID]: NEON: %d\n", cpu->neon); RARCH_LOG("[CPUID]: NEON: %d\n", cpu->neon);
#elif defined(ANDROID_X86) && defined(HAVE_SSSE3)
cpu->ssse3 = (cpu_flags & ANDROID_CPU_X86_FEATURE_SSSE3);
RARCH_LOG("[CPUID]: SSSE3: %d\n", cpu->ssse3);
#endif #endif
} }

1
performance.h
View File

@ -44,7 +44,6 @@ struct rarch_cpu_features
{ {
bool sse; bool sse;
bool sse2; bool sse2;
bool ssse3;
bool vmx; bool vmx;
bool avx; bool avx;
bool neon; bool neon;

20
retroarch.c
View File

@ -2546,20 +2546,22 @@ static void validate_cpu_features(void)
struct rarch_cpu_features cpu; struct rarch_cpu_features cpu;
rarch_get_cpu_features(&cpu); rarch_get_cpu_features(&cpu);
#define FAIL_CPU(simd_type) do { \
RARCH_ERR(simd_type " code is compiled in, but CPU does not support this feature. Cannot continue.\n"); \
rarch_fail(1, "validate_cpu_features()"); \
} while(0)
#ifdef __SSE__
if (!cpu.sse)
FAIL_CPU("SSE");
#endif
#ifdef __SSE2__ #ifdef __SSE2__
if (!cpu.sse2) if (!cpu.sse2)
{ FAIL_CPU("SSE2");
RARCH_ERR("SSE2 code is compiled in, but CPU does not support this feature. Cannot continue.\n");
rarch_fail(1, "validate_cpu_features()");
}
#endif #endif
#ifdef __AVX__ #ifdef __AVX__
if (!cpu.avx) if (!cpu.avx)
{ FAIL_CPU("AVX");
RARCH_ERR("AVX code is compiled in, but CPU does not support this feature. Cannot continue.\n");
rarch_fail(1, "validate_cpu_features()");
}
#endif #endif
} }