From f1a5725f6688e868e827e475fe6052e47f8e4bf9 Mon Sep 17 00:00:00 2001 From: Hans-Kristian Arntzen Date: Mon, 21 Mar 2016 16:57:04 +0100 Subject: [PATCH] Vulkan: Host writes are implicitly flushed on submit. Use TOP_OF_PIPE/0 access instead to work around spammy asserts on Anvil. We still have to invalidate the caches however. --- gfx/common/vulkan_common.c | 12 ++++++------ gfx/drivers/vulkan.c | 4 ++-- 2 files changed, 8 insertions(+), 8 deletions(-) diff --git a/gfx/common/vulkan_common.c b/gfx/common/vulkan_common.c index 83e8fd530d..fd3ff0af55 100644 --- a/gfx/common/vulkan_common.c +++ b/gfx/common/vulkan_common.c @@ -444,8 +444,8 @@ struct vk_texture vulkan_create_texture(vk_t *vk, vulkan_image_layout_transition(vk, staging, tmp.image, VK_IMAGE_LAYOUT_PREINITIALIZED, VK_IMAGE_LAYOUT_GENERAL, - VK_ACCESS_HOST_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT, - VK_PIPELINE_STAGE_HOST_BIT, + 0, VK_ACCESS_TRANSFER_READ_BIT, + VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT); vulkan_image_layout_transition(vk, staging, tex.image, @@ -565,16 +565,16 @@ void vulkan_transition_texture(vk_t *vk, struct vk_texture *texture) case VULKAN_TEXTURE_STREAMED: vulkan_image_layout_transition(vk, vk->cmd, texture->image, texture->layout, VK_IMAGE_LAYOUT_GENERAL, - VK_ACCESS_HOST_WRITE_BIT, VK_ACCESS_SHADER_READ_BIT, - VK_PIPELINE_STAGE_HOST_BIT, + 0, VK_ACCESS_SHADER_READ_BIT, + VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT); break; case VULKAN_TEXTURE_STAGING: vulkan_image_layout_transition(vk, vk->cmd, texture->image, texture->layout, VK_IMAGE_LAYOUT_GENERAL, - VK_ACCESS_HOST_WRITE_BIT, VK_ACCESS_TRANSFER_READ_BIT, - VK_PIPELINE_STAGE_HOST_BIT, + 0, VK_ACCESS_TRANSFER_READ_BIT, + VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, VK_PIPELINE_STAGE_TRANSFER_BIT); break; diff --git a/gfx/drivers/vulkan.c b/gfx/drivers/vulkan.c index d5e4e786a6..013967a7e3 100644 --- a/gfx/drivers/vulkan.c +++ b/gfx/drivers/vulkan.c @@ -1354,11 +1354,11 @@ static void vulkan_readback(vk_t *vk) static void vulkan_flush_caches(vk_t *vk) { VkMemoryBarrier barrier = { VK_STRUCTURE_TYPE_MEMORY_BARRIER }; - barrier.srcAccessMask = VK_ACCESS_HOST_WRITE_BIT; + barrier.srcAccessMask = 0; barrier.dstAccessMask = VK_ACCESS_VERTEX_ATTRIBUTE_READ_BIT | VK_ACCESS_UNIFORM_READ_BIT; VKFUNC(vkCmdPipelineBarrier)(vk->cmd, - VK_PIPELINE_STAGE_HOST_BIT, + VK_PIPELINE_STAGE_TOP_OF_PIPE_BIT, VK_PIPELINE_STAGE_VERTEX_INPUT_BIT | VK_PIPELINE_STAGE_VERTEX_SHADER_BIT | VK_PIPELINE_STAGE_FRAGMENT_SHADER_BIT,