mirror of
https://github.com/CTCaer/RetroArch.git
synced 2024-12-23 03:10:14 +00:00
561 lines
13 KiB
C
561 lines
13 KiB
C
#define STRUCT_REGDEF_SIZE 1440
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#define WGPIPE (0xCC008000)
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#define FIFO_PUTU8(x) *(vu8*)WGPIPE = (u8)(x)
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#define FIFO_PUTS8(x) *(vs8*)WGPIPE = (s8)(x)
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#define FIFO_PUTU16(x) *(vu16*)WGPIPE = (u16)(x)
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#define FIFO_PUTS16(x) *(vs16*)WGPIPE = (s16)(x)
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#define FIFO_PUTU32(x) *(vu32*)WGPIPE = (u32)(x)
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#define FIFO_PUTS32(x) *(vs32*)WGPIPE = (s32)(x)
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#define FIFO_PUTF32(x) *(vf32*)WGPIPE = (f32)(x)
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#define XY(x, y) (((y) << 10) | (x))
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#define GX_LOAD_BP_REG(x) \
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FIFO_PUTU8(0x61); \
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FIFO_PUTU32((x))
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#define GX_LOAD_CP_REG(x, y) \
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FIFO_PUTU8(0x08); \
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FIFO_PUTU8((x)); \
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FIFO_PUTU32((y))
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#define GX_LOAD_XF_REG(x, y) \
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FIFO_PUTU8(0x10); \
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FIFO_PUTU32(((x)&0xffff)); \
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FIFO_PUTU32((y))
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#define GX_LOAD_XF_REGS(x, n) \
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FIFO_PUTU8(0x10); \
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FIFO_PUTU32((((((n)&0xffff)-1)<<16)|((x)&0xffff)))
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extern u8 __gxregs[];
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struct __gx_regdef
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{
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u16 cpSRreg;
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u16 cpCRreg;
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u16 cpCLreg;
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u16 xfFlush;
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u16 xfFlushExp;
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u16 xfFlushSafe;
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u32 gxFifoInited;
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u32 vcdClear;
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u32 VATTable;
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u32 mtxIdxLo;
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u32 mtxIdxHi;
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u32 texCoordManually;
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u32 vcdLo;
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u32 vcdHi;
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u32 vcdNrms;
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u32 dirtyState;
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u32 perf0Mode;
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u32 perf1Mode;
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u32 cpPerfMode;
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u32 VAT0reg[8];
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u32 VAT1reg[8];
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u32 VAT2reg[8];
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u32 texMapSize[8];
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u32 texMapWrap[8];
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u32 sciTLcorner;
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u32 sciBRcorner;
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u32 lpWidth;
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u32 genMode;
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u32 suSsize[8];
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u32 suTsize[8];
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u32 tevTexMap[16];
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u32 tevColorEnv[16];
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u32 tevAlphaEnv[16];
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u32 tevSwapModeTable[8];
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u32 tevRasOrder[11];
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u32 tevTexCoordEnable;
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u32 tevIndMask;
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u32 texCoordGen[8];
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u32 texCoordGen2[8];
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u32 dispCopyCntrl;
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u32 dispCopyDst;
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u32 dispCopyTL;
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u32 dispCopyWH;
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u32 texCopyCntrl;
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u32 texCopyDst;
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u32 texCopyTL;
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u32 texCopyWH;
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u32 peZMode;
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u32 peCMode0;
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u32 peCMode1;
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u32 peCntrl;
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u32 chnAmbColor[2];
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u32 chnMatColor[2];
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u32 chnCntrl[4];
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GXTexRegion texRegion[24];
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GXTlutRegion tlutRegion[20];
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u8 saveDLctx;
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u8 gxFifoUnlinked;
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u8 texCopyZTex;
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u8 _pad;
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} __attribute__((packed));
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struct __gx_texobj
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{
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u32 tex_filt;
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u32 tex_lod;
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u32 tex_size;
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u32 tex_maddr;
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u32 usr_data;
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u32 tex_fmt;
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u32 tex_tlut;
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u16 tex_tile_cnt;
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u8 tex_tile_type;
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u8 tex_flag;
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} __attribute__((packed));
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#define __GX_SetDispCopySrc(__gx, left, top, wd, ht) \
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__gx->dispCopyTL = (__gx->dispCopyTL&~0x00ffffff)|XY(left,top); \
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__gx->dispCopyTL = (__gx->dispCopyTL&~0xff000000)|(_SHIFTL(0x49,24,8)); \
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__gx->dispCopyWH = (__gx->dispCopyWH&~0x00ffffff)|XY((wd-1),(ht-1)); \
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__gx->dispCopyWH = (__gx->dispCopyWH&~0xff000000)|(_SHIFTL(0x4a,24,8))
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#define __GX_SetDispCopyDst(__gx, wd, ht) \
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__gx->dispCopyDst = (__gx->dispCopyDst&~0x3ff)|(_SHIFTR(wd,4,10)); \
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__gx->dispCopyDst = (__gx->dispCopyDst&~0xff000000)|(_SHIFTL(0x4d,24,8))
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#define __GX_SetClipMode(mode) GX_LOAD_XF_REG(0x1005,(mode&1))
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static inline void __GX_CopyDisp(struct __gx_regdef *__gx, void *dest,u8 clear)
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{
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u8 clflag;
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u32 val;
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if(clear)
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{
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val= (__gx->peZMode&~0xf)|0xf;
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GX_LOAD_BP_REG(val);
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val = (__gx->peCMode0&~0x3);
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GX_LOAD_BP_REG(val);
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}
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clflag = 0;
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if(clear || (__gx->peCntrl&0x7)==0x0003)
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{
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if(__gx->peCntrl&0x40)
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{
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clflag = 1;
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val = (__gx->peCntrl&~0x40);
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GX_LOAD_BP_REG(val);
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}
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}
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GX_LOAD_BP_REG(__gx->dispCopyTL); // set source top
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GX_LOAD_BP_REG(__gx->dispCopyWH);
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GX_LOAD_BP_REG(__gx->dispCopyDst);
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val = 0x4b000000|(_SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(dest),5,24));
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GX_LOAD_BP_REG(val);
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__gx->dispCopyCntrl = (__gx->dispCopyCntrl&~0x800)|(_SHIFTL(clear,11,1));
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__gx->dispCopyCntrl = (__gx->dispCopyCntrl&~0x4000)|0x4000;
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__gx->dispCopyCntrl = (__gx->dispCopyCntrl&~0xff000000)|(_SHIFTL(0x52,24,8));
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GX_LOAD_BP_REG(__gx->dispCopyCntrl);
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if(clear)
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{
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GX_LOAD_BP_REG(__gx->peZMode);
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GX_LOAD_BP_REG(__gx->peCMode0);
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}
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if(clflag)
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{
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GX_LOAD_BP_REG(__gx->peCntrl);
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}
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}
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#define XSHIFT 2
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#define YSHIFT 2
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#define __GX_InitTexObj(ptr, img_ptr, wd, ht, fmt, wrap_s, wrap_t, mipmap) \
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ptr->tex_filt = (ptr->tex_filt&~0x03)|(wrap_s&3); \
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ptr->tex_filt = (ptr->tex_filt&~0x0c)|(_SHIFTL(wrap_t,2,2)); \
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ptr->tex_filt = (ptr->tex_filt&~0x10)|0x10; \
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/* no mip-mapping */ \
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ptr->tex_filt= (ptr->tex_filt&~0xE0)|0x0080; \
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ptr->tex_fmt = fmt; \
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ptr->tex_size = (ptr->tex_size&~0x3ff)|((wd-1)&0x3ff); \
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ptr->tex_size = (ptr->tex_size&~0xFFC00)|(_SHIFTL((ht-1),10,10)); \
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ptr->tex_size = (ptr->tex_size&~0xF00000)|(_SHIFTL(fmt,20,4)); \
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ptr->tex_maddr = (ptr->tex_maddr&~0x01ffffff)|(_SHIFTR(MEM_VIRTUAL_TO_PHYSICAL(img_ptr),5,24)); \
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ptr->tex_tile_type = 2; \
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ptr->tex_tile_cnt = ((((wd+(1 << XSHIFT))-1) >> XSHIFT) * (((ht+(1 << YSHIFT))-1) >> YSHIFT)) & 0x7fff; \
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ptr->tex_flag |= 0x0002
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#define __GX_InvalidateTexAll(__gx) \
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GX_LOAD_BP_REG(__gx->tevIndMask); \
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GX_LOAD_BP_REG(0x66001000); \
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GX_LOAD_BP_REG(0x66001100); \
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GX_LOAD_BP_REG(__gx->tevIndMask)
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#define __GX_SetCurrentMtx(__gx, mtx) \
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__gx->mtxIdxLo = (__gx->mtxIdxLo&~0x3f)|(mtx&0x3f); \
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__gx->dirtyState |= 0x04000000
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#define __GX_SetVAT(__gx, setvtx) \
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for(s32 i = 0; i < 8;i++) \
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{ \
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setvtx = (1<<i); \
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if(__gx->VATTable&setvtx) \
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{ \
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GX_LOAD_CP_REG((0x70+(i&7)),__gx->VAT0reg[i]); \
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GX_LOAD_CP_REG((0x80+(i&7)),__gx->VAT1reg[i]); \
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GX_LOAD_CP_REG((0x90+(i&7)),__gx->VAT2reg[i]); \
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} \
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} \
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__gx->VATTable = 0
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#define __GX_XfVtxSpecs(__gx) \
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{ \
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u32 nrms,texs,cols; \
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cols = 0; \
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if(__gx->vcdLo&0x6000) cols++; \
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if(__gx->vcdLo&0x18000) cols++; \
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nrms = 0; \
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if(__gx->vcdNrms==1) nrms = 1; \
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else if(__gx->vcdNrms==2) nrms = 2; \
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texs = 0; \
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if(__gx->vcdHi & 0x3) texs++; \
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if(__gx->vcdHi & 0xc) texs++; \
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if(__gx->vcdHi&0x30) texs++; \
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if(__gx->vcdHi&0xc0) texs++; \
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if(__gx->vcdHi&0x300) texs++; \
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if(__gx->vcdHi&0xc00) texs++; \
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if(__gx->vcdHi&0x3000) texs++; \
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if(__gx->vcdHi&0xc000) texs++; \
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GX_LOAD_XF_REG(0x1008, ((_SHIFTL(texs,4,4))|(_SHIFTL(nrms,2,2))|(cols&0x3))); \
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}
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#define __GX_SetVCD(__gx) \
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GX_LOAD_CP_REG(0x50,__gx->vcdLo); \
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GX_LOAD_CP_REG(0x60,__gx->vcdHi); \
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__GX_XfVtxSpecs(__gx)
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#define __GX_SetChanCntrl(__gx) \
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{ \
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u32 i,chan,mask; \
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if(__gx->dirtyState&0x01000000) \
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{ \
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GX_LOAD_XF_REG(0x1009,(_SHIFTR(__gx->genMode,4,3))); \
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} \
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i = 0; \
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chan = 0x100e; \
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mask = _SHIFTR(__gx->dirtyState,12,4); \
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while(mask) { \
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if(mask&0x0001) \
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{ \
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GX_LOAD_XF_REG(chan,__gx->chnCntrl[i]); \
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} \
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mask >>= 1; \
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chan++; \
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i++; \
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} \
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}
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#define __GX_SetMatrixIndex(__gx, mtx) \
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if(mtx<5) { \
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GX_LOAD_CP_REG(0x30,__gx->mtxIdxLo); \
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GX_LOAD_XF_REG(0x1018,__gx->mtxIdxLo); \
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} else { \
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GX_LOAD_CP_REG(0x40,__gx->mtxIdxHi); \
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GX_LOAD_XF_REG(0x1019,__gx->mtxIdxHi); \
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}
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#ifdef HW_DOL
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static inline void __GX_UpdateBPMask(struct __gx_regdef *__gx)
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{
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u32 i;
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u32 nbmp,nres;
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u8 ntexmap;
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nbmp = _SHIFTR(_gx[0xac],16,3);
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nres = 0;
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for(i=0;i<nbmp;i++) {
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switch(i) {
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case GX_INDTEXSTAGE0:
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ntexmap = _gx[0xc2]&7;
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break;
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case GX_INDTEXSTAGE1:
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ntexmap = _SHIFTR(_gx[0xc2],6,3);
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break;
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case GX_INDTEXSTAGE2:
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ntexmap = _SHIFTR(_gx[0xc2],12,3);
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break;
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case GX_INDTEXSTAGE3:
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ntexmap = _SHIFTR(_gx[0xc2],18,3);
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break;
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default:
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ntexmap = 0;
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break;
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}
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nres |= (1<<ntexmap);
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}
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if((_gx[0xaf]&0xff)!=nres)
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{
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_gx[0xaf] = (_gx[0xaf]&~0xff)|(nres&0xff);
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GX_LOAD_BP_REG(_gx[0xaf]);
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}
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}
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#endif
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#define __GX_SetChanColor(__gx) \
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if(__gx->dirtyState&0x0100) \
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{ \
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GX_LOAD_XF_REG(0x100a,__gx->chnAmbColor[0]); \
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} \
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if(__gx->dirtyState&0x0200) \
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{ \
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GX_LOAD_XF_REG(0x100b,__gx->chnAmbColor[1]); \
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} \
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if(__gx->dirtyState&0x0400) \
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{ \
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GX_LOAD_XF_REG(0x100c,__gx->chnMatColor[0]); \
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} \
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if(__gx->dirtyState&0x0800) \
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{ \
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GX_LOAD_XF_REG(0x100d,__gx->chnMatColor[1]); \
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}
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static inline void __GX_SetTexCoordGen(struct __gx_regdef *__gx)
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{
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u32 i,mask;
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u32 texcoord;
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if(__gx->dirtyState&0x02000000)
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{
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GX_LOAD_XF_REG(0x103f,(__gx->genMode&0xf));
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}
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i = 0;
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texcoord = 0x1040;
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mask = _SHIFTR(__gx->dirtyState,16,8);
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while(mask) {
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if(mask&0x0001) {
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GX_LOAD_XF_REG(texcoord,__gx->texCoordGen[i]);
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GX_LOAD_XF_REG((texcoord+0x10),__gx->texCoordGen2[i]);
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}
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mask >>= 1;
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texcoord++;
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i++;
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}
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}
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static void __SetSURegs(struct __gx_regdef *__gx, u8 texmap,u8 texcoord)
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{
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u32 reg;
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u16 wd,ht;
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u8 wrap_s,wrap_t;
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wd = __gx->texMapSize[texmap]&0x3ff;
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ht = _SHIFTR(__gx->texMapSize[texmap],10,10);
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wrap_s = __gx->texMapWrap[texmap]&3;
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wrap_t = _SHIFTR(__gx->texMapWrap[texmap],2,2);
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reg = (texcoord&0x7);
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__gx->suSsize[reg] = (__gx->suSsize[reg]&~0x0000ffff)|wd;
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__gx->suTsize[reg] = (__gx->suTsize[reg]&~0x0000ffff)|ht;
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__gx->suSsize[reg] = (__gx->suSsize[reg]&~0x00010000)|(_SHIFTL(wrap_s,16,1));
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__gx->suTsize[reg] = (__gx->suTsize[reg]&~0x00010000)|(_SHIFTL(wrap_t,16,1));
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GX_LOAD_BP_REG(__gx->suSsize[reg]);
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GX_LOAD_BP_REG(__gx->suTsize[reg]);
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}
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static inline void __GX_SetSUTexRegs(struct __gx_regdef *__gx)
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{
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u32 i;
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u32 indtev,dirtev;
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u8 texcoord,texmap;
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u32 tevreg,tevm,texcm;
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dirtev = (_SHIFTR(__gx->genMode,10,4))+1;
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indtev = _SHIFTR(__gx->genMode,16,3);
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//indirect texture order
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for(i=0;i<indtev;i++) {
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switch(i) {
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case GX_INDTEXSTAGE0:
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texmap = __gx->tevRasOrder[2]&7;
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texcoord = _SHIFTR(__gx->tevRasOrder[2],3,3);
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break;
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case GX_INDTEXSTAGE1:
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texmap = _SHIFTR(__gx->tevRasOrder[2],6,3);
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texcoord = _SHIFTR(__gx->tevRasOrder[2],9,3);
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break;
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case GX_INDTEXSTAGE2:
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texmap = _SHIFTR(__gx->tevRasOrder[2],12,3);
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texcoord = _SHIFTR(__gx->tevRasOrder[2],15,3);
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break;
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case GX_INDTEXSTAGE3:
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texmap = _SHIFTR(__gx->tevRasOrder[2],18,3);
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texcoord = _SHIFTR(__gx->tevRasOrder[2],21,3);
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break;
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default:
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texmap = 0;
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texcoord = 0;
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break;
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}
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texcm = _SHIFTL(1,texcoord,1);
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if(!(__gx->texCoordManually&texcm))
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__SetSURegs(__gx, texmap,texcoord);
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}
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//direct texture order
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for(i=0;i<dirtev;i++) {
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tevreg = 3+(_SHIFTR(i,1,3));
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texmap = (__gx->tevTexMap[i]&0xff);
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if(i&1) texcoord = _SHIFTR(__gx->tevRasOrder[tevreg],15,3);
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else texcoord = _SHIFTR(__gx->tevRasOrder[tevreg],3,3);
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tevm = _SHIFTL(1,i,1);
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texcm = _SHIFTL(1,texcoord,1);
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if(texmap!=0xff && (__gx->tevTexCoordEnable&tevm) && !(__gx->texCoordManually&texcm)) {
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__SetSURegs(__gx, texmap,texcoord);
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}
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}
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}
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#define __GX_SetGenMode(__gx) \
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GX_LOAD_BP_REG(__gx->genMode); \
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__gx->xfFlush = 0
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static void __GX_SetDirtyState(struct __gx_regdef *__gx)
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{
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if(__gx->dirtyState&0x0001)
|
|
{
|
|
__GX_SetSUTexRegs(__gx);
|
|
}
|
|
#ifdef HW_DOL
|
|
if(__gx->dirtyState&0x0002)
|
|
{
|
|
__GX_UpdateBPMask(__gx);
|
|
}
|
|
#endif
|
|
if(__gx->dirtyState&0x0004)
|
|
{
|
|
__GX_SetGenMode(__gx);
|
|
}
|
|
if(__gx->dirtyState&0x0008)
|
|
{
|
|
__GX_SetVCD(__gx);
|
|
}
|
|
if(__gx->dirtyState&0x0010)
|
|
{
|
|
u8 setvtx = 0;
|
|
__GX_SetVAT(__gx, setvtx);
|
|
}
|
|
if(__gx->dirtyState&~0xff)
|
|
{
|
|
if(__gx->dirtyState&0x0f00)
|
|
{
|
|
__GX_SetChanColor(__gx);
|
|
}
|
|
if(__gx->dirtyState&0x0100f000)
|
|
{
|
|
__GX_SetChanCntrl(__gx);
|
|
}
|
|
if(__gx->dirtyState&0x02ff0000)
|
|
{
|
|
__GX_SetTexCoordGen(__gx);
|
|
}
|
|
if(__gx->dirtyState&0x04000000)
|
|
{
|
|
__GX_SetMatrixIndex(__gx, 0);
|
|
__GX_SetMatrixIndex(__gx, 5);
|
|
}
|
|
}
|
|
__gx->dirtyState = 0;
|
|
}
|
|
|
|
static void __GX_SendFlushPrim(struct __gx_regdef *__gx)
|
|
{
|
|
u32 tmp,tmp2,cnt;
|
|
|
|
tmp = (__gx->xfFlush*__gx->xfFlushExp);
|
|
|
|
FIFO_PUTU8(0x98);
|
|
FIFO_PUTU16(__gx->xfFlush);
|
|
|
|
tmp2 = (tmp+3)/4;
|
|
|
|
if(tmp > 0)
|
|
{
|
|
cnt = tmp2/8;
|
|
while(cnt)
|
|
{
|
|
FIFO_PUTU32(0);
|
|
FIFO_PUTU32(0);
|
|
FIFO_PUTU32(0);
|
|
FIFO_PUTU32(0);
|
|
FIFO_PUTU32(0);
|
|
FIFO_PUTU32(0);
|
|
FIFO_PUTU32(0);
|
|
FIFO_PUTU32(0);
|
|
cnt--;
|
|
}
|
|
tmp2 &= 0x0007;
|
|
if(tmp2)
|
|
{
|
|
while(tmp2)
|
|
{
|
|
FIFO_PUTU32(0);
|
|
tmp2--;
|
|
}
|
|
}
|
|
}
|
|
__gx->xfFlush = 1;
|
|
}
|
|
|
|
#define __GX_InitTexObjFilterMode(ptr, minfilt, magfilt) \
|
|
{ \
|
|
static u8 GX2HWFiltConv[] = {0x00,0x04,0x01,0x05,0x02,0x06,0x00,0x00}; \
|
|
ptr->tex_filt = (ptr->tex_filt&~0x10)|(_SHIFTL((magfilt==GX_LINEAR?1:0),4,1)); \
|
|
ptr->tex_filt = (ptr->tex_filt&~0xe0)|(_SHIFTL(GX2HWFiltConv[minfilt],5,3)); \
|
|
}
|
|
|
|
#define __GX_SetCullMode(__gx, mode) \
|
|
{ \
|
|
static u8 cm2hw[] = { 0, 2, 1, 3 }; \
|
|
__gx->genMode = (__gx->genMode&~0xC000)|(_SHIFTL(cm2hw[mode],14,2)); \
|
|
__gx->dirtyState |= 0x0004; \
|
|
}
|
|
|
|
#define __GX_CallDispList(__gx, list, nbytes) \
|
|
if(__gx->dirtyState) \
|
|
{ \
|
|
__GX_SetDirtyState(__gx); \
|
|
} \
|
|
if(!__gx->vcdClear) \
|
|
{ \
|
|
__GX_SendFlushPrim(__gx); \
|
|
} \
|
|
FIFO_PUTU8(0x40); /*call displaylist */ \
|
|
FIFO_PUTU32(MEM_VIRTUAL_TO_PHYSICAL(list)); \
|
|
FIFO_PUTU32(nbytes)
|
|
|
|
#define __GX_Flush(__gx) \
|
|
if(__gx->dirtyState) \
|
|
__GX_SetDirtyState(__gx); \
|
|
wgPipe->U32 = 0; \
|
|
wgPipe->U32 = 0; \
|
|
wgPipe->U32 = 0; \
|
|
wgPipe->U32 = 0; \
|
|
wgPipe->U32 = 0; \
|
|
wgPipe->U32 = 0; \
|
|
wgPipe->U32 = 0; \
|
|
wgPipe->U32 = 0; \
|
|
ppcsync()
|