mirror of
https://github.com/CTCaer/RetroArch.git
synced 2024-12-23 11:18:25 +00:00
250 lines
8.8 KiB
C
250 lines
8.8 KiB
C
/* RetroArch - A frontend for libretro.
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* Copyright (C) 2014-2016 - Ali Bouhlel
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*
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* RetroArch is free software: you can redistribute it and/or modify it under the terms
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* of the GNU General Public License as published by the Free Software Found-
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* ation, either version 3 of the License, or (at your option) any later version.
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*
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* RetroArch is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;
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* without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
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* PURPOSE. See the GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along with RetroArch.
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* If not, see <http://www.gnu.org/licenses/>.
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*/
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/* this file contains mostly modified functions from the ctrulib sdk */
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#ifndef CTR_GU_H
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#define CTR_GU_H
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#include <3ds.h>
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#include <stdint.h>
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#include <string.h>
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#include <retro_inline.h>
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#define VIRT_TO_PHYS(vaddr) \
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(((u32)(vaddr)) >= 0x14000000 && ((u32)(vaddr)) < 0x1c000000)?(void*)((u32)(vaddr) + 0x0c000000):\
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(((u32)(vaddr)) >= 0x1F000000 && ((u32)(vaddr)) < 0x1F600000)?(void*)((u32)(vaddr) - 0x07000000):\
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(((u32)(vaddr)) >= 0x1FF00000 && ((u32)(vaddr)) < 0x1FF80000)?(void*)(vaddr):\
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(((u32)(vaddr)) >= 0x30000000 && ((u32)(vaddr)) < 0x40000000)?(void*)((u32)(vaddr) - 0x10000000):(void*)0
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#define CTRGU_SIZE(W,H) (((u32)(W)&0xFFFF)|((u32)(H)<<16))
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/* DMA flags */
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#define CTRGU_DMA_VFLIP (1 << 0)
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#define CTRGU_DMA_L_TO_T (1 << 1)
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#define CTRGU_DMA_T_TO_L (0 << 1)
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#define CTRGU_DMA_TRUNCATE (1 << 2)
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#define CTRGU_DMA_CONVERT_NONE (1 << 3)
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#define CTRGU_RGBA8 (0)
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#define CTRGU_RGB8 (1)
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#define CTRGU_RGB565 (2)
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#define CTRGU_RGBA5551 (3)
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#define CTRGU_RGBA4444 (4)
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#define CTRGU_MULTISAMPLE_NONE (0 << 24)
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#define CTRGU_MULTISAMPLE_2x1 (1 << 24)
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#define CTRGU_MULTISAMPLE_2x2 (2 << 24)
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#define CTR_CPU_TICKS_PER_SECOND 268123480
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#define CTR_CPU_TICKS_PER_FRAME 4481134
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#ifndef DEBUG_HOLD
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void wait_for_input(void);
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#define PRINTFPOS(X,Y) "\x1b["#X";"#Y"H"
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#define PRINTF_LINE(X) "\x1b["X";0H"
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#define DEBUG_HOLD() do{printf("%s@%s:%d.\n",__FUNCTION__, __FILE__, __LINE__);fflush(stdout);wait_for_input();}while(0)
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#define DEBUG_VAR(X) printf( "%-20s: 0x%08X\n", #X, (u32)(X))
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#define DEBUG_VAR64(X) printf( #X"\r\t\t\t\t : 0x%016llX\n", (u64)(X))
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#endif
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extern Handle gspEvents[GSPGPU_EVENT_MAX];
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extern u32* gpuCmdBuf;
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extern u32 gpuCmdBufOffset;
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extern u32 __linear_heap_size;
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extern u32 __linear_heap;
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__attribute__((always_inline))
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static INLINE Result ctr_set_parallax_layer(bool state)
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{
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u32 reg_state = state? 0x00010001: 0x0;
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return GSPGPU_WriteHWRegs(0x202000, ®_state, 4);
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}
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__attribute__((always_inline))
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static INLINE void ctrGuSetTexture(GPU_TEXUNIT unit, u32* data,
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u16 width, u16 height, u32 param, GPU_TEXCOLOR colorType)
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{
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switch (unit)
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{
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case GPU_TEXUNIT0:
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GPUCMD_AddWrite(GPUREG_TEXUNIT0_TYPE, colorType);
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GPUCMD_AddWrite(GPUREG_TEXUNIT0_ADDR1, ((u32)data)>>3);
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GPUCMD_AddWrite(GPUREG_TEXUNIT0_DIM, (height)|(width<<16));
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GPUCMD_AddWrite(GPUREG_TEXUNIT0_PARAM, param);
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break;
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case GPU_TEXUNIT1:
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GPUCMD_AddWrite(GPUREG_TEXUNIT1_TYPE, colorType);
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GPUCMD_AddWrite(GPUREG_TEXUNIT1_ADDR, ((u32)data)>>3);
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GPUCMD_AddWrite(GPUREG_TEXUNIT1_DIM, (height)|(width<<16));
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GPUCMD_AddWrite(GPUREG_TEXUNIT1_PARAM, param);
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break;
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case GPU_TEXUNIT2:
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GPUCMD_AddWrite(GPUREG_TEXUNIT2_TYPE, colorType);
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GPUCMD_AddWrite(GPUREG_TEXUNIT2_ADDR, ((u32)data)>>3);
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GPUCMD_AddWrite(GPUREG_TEXUNIT2_DIM, (height)|(width<<16));
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GPUCMD_AddWrite(GPUREG_TEXUNIT2_PARAM, param);
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break;
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}
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}
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__attribute__((always_inline))
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static INLINE Result ctrGuSetCommandList_First(bool queued, u32* buf0a, u32 buf0s, u32* buf1a, u32 buf1s, u32* buf2a, u32 buf2s)
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{
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u32 gxCommand[0x8];
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gxCommand[0]=0x05 | (queued? 0x01000000 : 0x0); //CommandID
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gxCommand[1]=(u32)buf0a; //buf0 address
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gxCommand[2]=(u32)buf0s; //buf0 size
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gxCommand[3]=(u32)buf1a; //buf1 address
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gxCommand[4]=(u32)buf1s; //buf1 size
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gxCommand[5]=(u32)buf2a; //buf2 address
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gxCommand[6]=(u32)buf2s; //buf2 size
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gxCommand[7]=0x0;
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return gspSubmitGxCommand(gxCmdBuf, gxCommand);
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}
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__attribute__((always_inline))
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static INLINE Result ctrGuSetCommandList_Last(bool queued, u32* buf0a, u32 buf0s, u8 flags)
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{
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u32 gxCommand[0x8];
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gxCommand[0]=0x01 | (queued? 0x01000000 : 0x0); //CommandID
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gxCommand[1]=(u32)buf0a; //buf0 address
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gxCommand[2]=(u32)buf0s; //buf0 size
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gxCommand[3]=flags&1; //written to GSP module state
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gxCommand[4]=gxCommand[5]=gxCommand[6]=0x0;
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gxCommand[7]=(flags>>1)&1; //when non-zero, call svcFlushProcessDataCache() with the specified buffer
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return gspSubmitGxCommand(gxCmdBuf, gxCommand);
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}
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__attribute__((always_inline))
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static INLINE void ctrGuFlushAndRun(bool queued)
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{
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//take advantage of GX_SetCommandList_First to flush gsp heap
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ctrGuSetCommandList_First(queued, gpuCmdBuf, gpuCmdBufOffset*4, (u32*)__linear_heap, __linear_heap_size, NULL, 0);
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ctrGuSetCommandList_Last(queued, gpuCmdBuf, gpuCmdBufOffset*4, 0x0);
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}
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__attribute__((always_inline))
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static INLINE Result ctrGuSetMemoryFill(bool queued, u32* buf0a, u32 buf0v, u32* buf0e, u16 width0, u32* buf1a, u32 buf1v, u32* buf1e, u16 width1)
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{
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u32 gxCommand[0x8];
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gxCommand[0]=0x02 | (queued? 0x01000000 : 0x0); //CommandID
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gxCommand[1]=(u32)buf0a; //buf0 address
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gxCommand[2]=buf0v; //buf0 value
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gxCommand[3]=(u32)buf0e; //buf0 end addr
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gxCommand[4]=(u32)buf1a; //buf1 address
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gxCommand[5]=buf1v; //buf1 value
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gxCommand[6]=(u32)buf1e; //buf1 end addr
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gxCommand[7]=(width0)|(width1<<16);
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return gspSubmitGxCommand(gxCmdBuf, gxCommand);
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}
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__attribute__((always_inline))
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static INLINE Result ctrGuCopyImage
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(bool queued,
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const void* src, int src_w, int src_h, int src_fmt, bool src_is_tiled,
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void* dst, int dst_w, int dst_fmt, bool dst_is_tiled)
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{
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u32 gxCommand[0x8];
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gxCommand[0]=0x03 | (queued? 0x01000000 : 0x0); //CommandID
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gxCommand[1]=(u32)src;
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gxCommand[2]=(u32)dst;
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gxCommand[3]=dst_w&0xFF8;
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gxCommand[4]=CTRGU_SIZE(src_w, src_h);
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gxCommand[5]=(src_fmt << 8)|(dst_fmt << 12)
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| ((src_is_tiled == dst_is_tiled)? CTRGU_DMA_CONVERT_NONE
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: src_is_tiled? CTRGU_DMA_T_TO_L
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: CTRGU_DMA_L_TO_T)
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| ((dst_w > src_w) ? CTRGU_DMA_TRUNCATE : 0);
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gxCommand[6]=gxCommand[7]=0x0;
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return gspSubmitGxCommand(gxCmdBuf, gxCommand);
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}
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__attribute__((always_inline))
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static INLINE Result ctrGuDisplayTransfer
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(bool queued,
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void* src, int src_w, int src_h, int src_fmt,
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void* dst, int dst_w, int dst_fmt, int multisample_lvl)
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{
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u32 gxCommand[0x8];
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gxCommand[0]=0x03 | (queued? 0x01000000 : 0x0); //CommandID
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gxCommand[1]=(u32)src;
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gxCommand[2]=(u32)dst;
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gxCommand[3]=CTRGU_SIZE(dst_w, 0);
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gxCommand[4]=CTRGU_SIZE(src_w, src_h);
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gxCommand[5]=(src_fmt << 8) | (dst_fmt << 12) | multisample_lvl;
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gxCommand[6]=gxCommand[7]=0x0;
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return gspSubmitGxCommand(gxCmdBuf, gxCommand);
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}
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__attribute__((always_inline))
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static INLINE void ctrGuSetVertexShaderFloatUniform(int id, float* data, int count)
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{
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GPUCMD_AddWrite(GPUREG_VSH_FLOATUNIFORM_CONFIG, 0x80000000|(u32)id);
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GPUCMD_AddWrites(GPUREG_VSH_FLOATUNIFORM_DATA, (u32*)data, (u32)count * 4);
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}
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#define CTRGU_ATTRIBFMT(f, n) ((((n)-1)<<2)|((f)&3))
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__attribute__((always_inline))
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static INLINE void ctrGuSetAttributeBuffers(u32 total_attributes,
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void* base_address, u64 attribute_formats, u32 buffer_size)
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{
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u32 param[0x28];
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memset(param, 0x00, sizeof(param));
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param[0x0]=((u32)base_address)>>3;
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param[0x1]=attribute_formats & 0xFFFFFFFF;
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param[0x2]=((total_attributes-1)<<28)|0xFFF0000|((attribute_formats>>32)&0xFFFF);
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param[0x4]=0x76543210;
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param[0x5]=(total_attributes<<28)|((buffer_size&0xFFF)<<16)|0xBA98;
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GPUCMD_AddIncrementalWrites(GPUREG_ATTRIBBUFFERS_LOC, param, 0x00000027);
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GPUCMD_AddMaskedWrite(GPUREG_VSH_INPUTBUFFER_CONFIG, 0xB, 0xA0000000|(total_attributes-1));
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GPUCMD_AddWrite(GPUREG_VSH_NUM_ATTR, (total_attributes-1));
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GPUCMD_AddIncrementalWrites(GPUREG_VSH_ATTRIBUTES_PERMUTATION_LOW, ((u32[]){0x76543210, 0xBA98}), 2);
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}
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__attribute__((always_inline))
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static INLINE void ctrGuSetAttributeBuffersAddress(u32* baseAddress)
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{
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GPUCMD_AddWrite(GPUREG_ATTRIBBUFFERS_LOC, ((u32)baseAddress)>>3);
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}
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__attribute__((always_inline))
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static INLINE void ctrGuSetVshGsh(shaderProgram_s* sp, DVLB_s* dvlb, u32 vsh_output_count, u32 gsh_input_count)
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{
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dvlb->DVLE[0].outmapData[0] = vsh_output_count;
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dvlb->DVLE[0].outmapMask = (1 << vsh_output_count) - 1;
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shaderProgramInit(sp);
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shaderProgramSetVsh(sp, &dvlb->DVLE[0]);
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shaderProgramSetGsh(sp, &dvlb->DVLE[1], gsh_input_count);
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}
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#endif // CTR_GU_H
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