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switch-v5-atf2.6
switch-l4t-atf/fdts/stm32mp15xxab-pinctrl.dtsi

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fdts: stm32mp1: realign device tree with kernel There is one dtsi file per SoC version: - STM32MP151: common part for all version, Single Cortex-A7 - STM32MP153: Dual Cortex-A7 - STM32MP157: + GPU and DSI, but not needed for TF-A The STM32MP15xC include a cryptography peripheral, add it in a dedicated file. There are 4 packages available, for which the IOs number change. Have one file for each package. The 2 packages AB and AD are added. STM32157A-DK1 and STM32MP157C-DK2 share most of their features, a common dkx file is then created. Some reordering is done in other files, and realign with kernel DT files. The DDR files are generated with our internal tool, no changes in the registers values. Change-Id: I9f2ef00306310abe34b94c2f10fc7a77a10493d1 Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-18 13:04:14 +00:00
// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
/*
fix(fdts stm32mp1): correct copyright dates Add 2021 year in the file header Copyright line. Change-Id: I09f7bef1f746c429ff308286169354e58648a1cd Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-11-02 14:06:01 +00:00
* Copyright (c) 2019-2021, STMicroelectronics - All Rights Reserved
feat(fdts stm32mp1): align DT with latest kernel Update STM32MP1 device tree files with kernel 5.15. Change-Id: Id405a79e18c61e80cd2292a4f87b7b9641df9c82 Signed-off-by: Yann Gautier <yann.gautier@st.com>
2021-10-20 15:22:32 +00:00
* Author: Alexandre Torgue <alexandre.torgue@st.com> for STMicroelectronics.
fdts: stm32mp1: realign device tree with kernel There is one dtsi file per SoC version: - STM32MP151: common part for all version, Single Cortex-A7 - STM32MP153: Dual Cortex-A7 - STM32MP157: + GPU and DSI, but not needed for TF-A The STM32MP15xC include a cryptography peripheral, add it in a dedicated file. There are 4 packages available, for which the IOs number change. Have one file for each package. The 2 packages AB and AD are added. STM32157A-DK1 and STM32MP157C-DK2 share most of their features, a common dkx file is then created. Some reordering is done in other files, and realign with kernel DT files. The DDR files are generated with our internal tool, no changes in the registers values. Change-Id: I9f2ef00306310abe34b94c2f10fc7a77a10493d1 Signed-off-by: Yann Gautier <yann.gautier@st.com>
2020-09-18 13:04:14 +00:00
*/
&pinctrl {
st,package = <STM32MP_PKG_AB>;
gpioa: gpio@50002000 {
status = "okay";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 0 16>;
};
gpiob: gpio@50003000 {
status = "okay";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 16 16>;
};
gpioc: gpio@50004000 {
status = "okay";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 32 16>;
};
gpiod: gpio@50005000 {
status = "okay";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 48 16>;
};
gpioe: gpio@50006000 {
status = "okay";
ngpios = <16>;
gpio-ranges = <&pinctrl 0 64 16>;
};
gpiof: gpio@50007000 {
status = "okay";
ngpios = <6>;
gpio-ranges = <&pinctrl 6 86 6>;
};
gpiog: gpio@50008000 {
status = "okay";
ngpios = <10>;
gpio-ranges = <&pinctrl 6 102 10>;
};
gpioh: gpio@50009000 {
status = "okay";
ngpios = <2>;
gpio-ranges = <&pinctrl 0 112 2>;
};
};
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