CTCaer/switch-l4t-atf
1
0
Fork 0
mirror of https://github.com/CTCaer/switch-l4t-atf.git synced 2024-11-27 11:50:33 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

xlat_tables_v2: add base table section name parameter for spm_mm

Browse Source 
Core spm_mm code expects the translation tables are located in the
inner & outer WBWA & shareable memory.
REGISTER_XLAT_CONTEXT2 macro is used to specify the translation
table section in spm_mm.

In the commit 363830df1c (xlat_tables_v2: merge
REGISTER_XLAT_CONTEXT_{FULL_SPEC,RO_BASE_TABLE}), REGISTER_XLAT_CONTEXT2
macro explicitly specifies the base xlat table goes into .bss by default.
This change affects the existing SynQuacer spm_mm implementation.
plat/socionext/synquacer/include/plat.ld.S linker script intends to
locate ".bss.sp_base_xlat_table" into "sp_xlat_table" section,
but this implementation is no longer available.

This patch adds the base table section name parameter for
REGISTER_XLAT_CONTEXT2 so that platform can specify the
inner & outer WBWA & shareable memory for spm_mm base xlat table.
If PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME is not defined, base xlat table
goes into .bss by default, the result is same as before.

Change-Id: Ie0e1a235e5bd4288dc376f582d6c44c5df6d31b2
Signed-off-by: Masahisa Kojima <masahisa.kojima@linaro.org>
This commit is contained in:
Masahisa Kojima 2020-06-02 05:54:13 +09:00
parent ec29ce67cf
commit 0922e481e5
4 changed files with 12 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

8
include/lib/xlat_tables/xlat_tables_v2.h
View File

@ -201,16 +201,20 @@ typedef struct xlat_ctx xlat_ctx_t;
* _section_name:
* Specify the name of the section where the translation tables have to be
* placed by the linker.
*
* _base_table_section_name:
* Specify the name of the section where the base translation tables have to
* be placed by the linker.
*/
#define REGISTER_XLAT_CONTEXT2(_ctx_name, _mmap_count, _xlat_tables_count, \
_virt_addr_space_size, _phy_addr_space_size, \
_xlat_regime, _section_name) \
_xlat_regime, _section_name, _base_table_section_name) \
REGISTER_XLAT_CONTEXT_FULL_SPEC(_ctx_name, (_mmap_count), \
(_xlat_tables_count), \
(_virt_addr_space_size), \
(_phy_addr_space_size), \
(_xlat_regime), \
(_section_name), ".bss" \
(_section_name), (_base_table_section_name) \
)
/******************************************************************************

1
plat/socionext/synquacer/include/plat.ld.S
View File

@ -25,7 +25,6 @@ SECTIONS
*/
sp_xlat_table (NOLOAD) : ALIGN(PAGE_SIZE) {
*(sp_xlat_table)
*(.bss.sp_base_xlat_table)
} >SP_DRAM
}

1
plat/socionext/synquacer/include/platform_def.h
View File

@ -144,6 +144,7 @@
#define PLAT_SP_IMAGE_MMAP_REGIONS 30
#define PLAT_SP_IMAGE_MAX_XLAT_TABLES 20
#define PLAT_SP_IMAGE_XLAT_SECTION_NAME "sp_xlat_table"
#define PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME "sp_xlat_table"
#define PLAT_SQ_UART1_BASE PLAT_SQ_BOOT_UART_BASE
#define PLAT_SQ_UART1_SIZE ULL(0x1000)

6
services/std_svc/spm_mm/spm_mm_xlat.c
View File

@ -21,13 +21,17 @@
#ifndef PLAT_SP_IMAGE_XLAT_SECTION_NAME
#define PLAT_SP_IMAGE_XLAT_SECTION_NAME "xlat_table"
#endif
#ifndef PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME
#define PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME ".bss"
#endif
/* Allocate and initialise the translation context for the secure partitions. */
REGISTER_XLAT_CONTEXT2(sp,
PLAT_SP_IMAGE_MMAP_REGIONS,
PLAT_SP_IMAGE_MAX_XLAT_TABLES,
PLAT_VIRT_ADDR_SPACE_SIZE, PLAT_PHY_ADDR_SPACE_SIZE,
EL1_EL0_REGIME, PLAT_SP_IMAGE_XLAT_SECTION_NAME);
EL1_EL0_REGIME, PLAT_SP_IMAGE_XLAT_SECTION_NAME,
PLAT_SP_IMAGE_BASE_XLAT_SECTION_NAME);
/* Lock used for SP_MEMORY_ATTRIBUTES_GET and SP_MEMORY_ATTRIBUTES_SET */
static spinlock_t mem_attr_smc_lock;