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https://github.com/CTCaer/switch-l4t-atf.git
synced 2025-03-02 15:37:46 +00:00
Fix MISRA rule 8.4 Part 1
Rule 8.4: A compatible declaration shall be visible when an object or function with external linkage is defined Fixed for: make DEBUG=1 PLAT=fvp LOG_LEVEL=50 all Change-Id: I7c2ad3f5c015411c202605851240d5347e4cc8c7 Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
This commit is contained in:
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dc6aad2e13
commit
1af540ef2a
@ -14,6 +14,7 @@
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#include <platform.h>
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#include <platform_def.h>
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#include <stdint.h>
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#include "bl2_private.h"
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/*******************************************************************************
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -21,7 +21,7 @@ static unsigned int gicv2_compat;
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* spinlock are used either at boot time (when only a single CPU is active), or
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* when the system is fully coherent.
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*/
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spinlock_t gic_lock;
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static spinlock_t gic_lock;
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/*
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* Redistributor power operations are weakly bound so that they can be
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -79,6 +79,8 @@ void gicd_clr_igrpmodr(uintptr_t base, unsigned int id);
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void gicr_clr_igrpmodr0(uintptr_t base, unsigned int id);
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void gicr_clr_igroupr0(uintptr_t base, unsigned int id);
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void gicr_set_ipriorityr(uintptr_t base, unsigned int id, unsigned int pri);
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void gicr_set_icfgr0(uintptr_t base, unsigned int id, unsigned int cfg);
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void gicr_set_icfgr1(uintptr_t base, unsigned int id, unsigned int cfg);
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/*******************************************************************************
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* Private GICv3 helper function prototypes
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@ -34,7 +34,7 @@ typedef struct tzc400_instance {
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uint8_t num_regions;
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} tzc400_instance_t;
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tzc400_instance_t tzc400;
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static tzc400_instance_t tzc400;
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static inline unsigned int _tzc400_read_build_config(uintptr_t base)
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{
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -93,7 +93,7 @@
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* It is used to program region 0 ATTRIBUTES and ACCESS register.
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*/
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#define DEFINE_TZC_COMMON_CONFIGURE_REGION0(fn_name) \
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void _tzc##fn_name##_configure_region0(uintptr_t base, \
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static void _tzc##fn_name##_configure_region0(uintptr_t base, \
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tzc_region_attributes_t sec_attr, \
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unsigned int ns_device_access) \
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{ \
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@ -124,7 +124,7 @@
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* that function).
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*/
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#define DEFINE_TZC_COMMON_CONFIGURE_REGION(fn_name) \
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void _tzc##fn_name##_configure_region(uintptr_t base, \
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static void _tzc##fn_name##_configure_region(uintptr_t base, \
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unsigned int filters, \
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int region_no, \
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unsigned long long region_base, \
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@ -83,6 +83,7 @@ register_t bl1_smc_handler(unsigned int smc_fid,
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void bl1_print_next_bl_ep_info(const struct entry_point_info *bl_ep_info);
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void bl1_main(void);
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void bl1_plat_prepare_exit(entry_point_info_t *ep_info);
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/*
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* Check if the total number of FWU SMC calls are as expected.
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@ -7,6 +7,9 @@
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#ifndef BL2_H__
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#define BL2_H__
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struct entry_point_info;
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void bl2_main(void);
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struct entry_point_info *bl2_load_images(void);
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#endif /* BL2_H__ */
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@ -210,7 +210,6 @@ int load_auth_image(unsigned int image_id, image_info_t *image_data);
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#else
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uintptr_t page_align(uintptr_t value, unsigned dir);
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int load_image(meminfo_t *mem_layout,
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unsigned int image_id,
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uintptr_t image_base,
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@ -230,6 +229,7 @@ extern const char build_message[];
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extern const char version_string[];
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void print_entry_point_info(const entry_point_info_t *ep_info);
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uintptr_t page_align(uintptr_t value, unsigned dir);
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#endif /*__ASSEMBLY__*/
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -19,6 +19,9 @@ typedef struct bl_mem_params_node {
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bl_params_node_t params_node_mem;
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} bl_mem_params_node_t;
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extern bl_mem_params_node_t *bl_mem_params_desc_ptr;
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extern unsigned int bl_mem_params_desc_num;
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/*
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* Macro to register list of BL image descriptors,
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* defined as an array of bl_mem_params_node_t.
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -45,8 +45,11 @@ typedef struct pmf_svc_desc {
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/*
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* Convenience macro to allocate memory for a PMF service.
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*
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* The extern declaration is there to satisfy MISRA C-2012 rule 8.4.
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*/
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#define PMF_ALLOCATE_TIMESTAMP_MEMORY(_name, _total_id) \
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extern unsigned long long pmf_ts_mem_ ## _name[_total_id]; \
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unsigned long long pmf_ts_mem_ ## _name[_total_id] \
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__aligned(CACHE_WRITEBACK_GRANULE) \
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__section("pmf_timestamp_array") \
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@ -60,8 +63,13 @@ typedef struct pmf_svc_desc {
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/*
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* Convenience macros for capturing time-stamp.
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*
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* The extern declaration is there to satisfy MISRA C-2012 rule 8.4.
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*/
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#define PMF_DEFINE_CAPTURE_TIMESTAMP(_name, _flags) \
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void pmf_capture_timestamp_ ## _name( \
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unsigned int tid, \
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unsigned long long ts); \
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void pmf_capture_timestamp_ ## _name( \
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unsigned int tid, \
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unsigned long long ts) \
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@ -74,6 +82,9 @@ typedef struct pmf_svc_desc {
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if ((_flags) & PMF_DUMP_ENABLE) \
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__pmf_dump_timestamp(tid, ts); \
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} \
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void pmf_capture_timestamp_with_cache_maint_ ## _name( \
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unsigned int tid, \
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unsigned long long ts); \
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void pmf_capture_timestamp_with_cache_maint_ ## _name( \
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unsigned int tid, \
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unsigned long long ts) \
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@ -89,8 +100,12 @@ typedef struct pmf_svc_desc {
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/*
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* Convenience macros for retrieving time-stamp.
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*
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* The extern declaration is there to satisfy MISRA C-2012 rule 8.4.
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*/
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#define PMF_DEFINE_GET_TIMESTAMP(_name) \
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unsigned long long pmf_get_timestamp_by_index_ ## _name( \
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unsigned int tid, unsigned int cpuid, unsigned int flags);\
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unsigned long long pmf_get_timestamp_by_index_ ## _name( \
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unsigned int tid, unsigned int cpuid, unsigned int flags)\
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{ \
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@ -98,6 +113,8 @@ typedef struct pmf_svc_desc {
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uintptr_t base_addr = (uintptr_t) pmf_ts_mem_ ## _name; \
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return __pmf_get_timestamp(base_addr, tid, cpuid, flags);\
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} \
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unsigned long long pmf_get_timestamp_by_mpidr_ ## _name( \
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unsigned int tid, u_register_t mpidr, unsigned int flags);\
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unsigned long long pmf_get_timestamp_by_mpidr_ ## _name( \
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unsigned int tid, u_register_t mpidr, unsigned int flags)\
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{ \
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@ -237,4 +237,8 @@ int arm_execution_state_switch(unsigned int smc_fid,
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uint32_t cookie_lo,
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void *handle);
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/* global variables */
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extern plat_psci_ops_t plat_arm_psci_pm_ops;
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extern const mmap_region_t plat_arm_mmap[];
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#endif /* __PLAT_ARM_H__ */
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@ -115,7 +115,7 @@ static uint64_t *xlat_table_get_empty(xlat_ctx_t *ctx)
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/*
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* Returns a block/page table descriptor for the given level and attributes.
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*/
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uint64_t xlat_desc(const xlat_ctx_t *ctx, mmap_attr_t attr,
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static uint64_t xlat_desc(const xlat_ctx_t *ctx, mmap_attr_t attr,
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unsigned long long addr_pa, int level)
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{
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uint64_t desc;
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@ -1,10 +1,11 @@
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/*
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat_arm.h>
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#include <platform.h>
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#include <tbbr_img_def.h>
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#include "fvp_private.h"
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@ -1,10 +1,11 @@
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/*
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* Copyright (c) 2013-2015, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <plat_arm.h>
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#include <platform.h>
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#include "fvp_def.h"
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#include "fvp_private.h"
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/*
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* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -18,6 +18,7 @@
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#include <secure_partition.h>
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#include <v2m_def.h>
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#include "../fvp_def.h"
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#include "fvp_private.h"
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/* Defines for GIC Driver build time selection */
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#define FVP_GICV2 1
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/*
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* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -9,6 +9,7 @@
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#include <debug.h>
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#include <errno.h>
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#include <norflash.h>
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#include <platform.h>
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#include <stdint.h>
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/*
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@ -16,6 +16,7 @@
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#include <psci.h>
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#include <spe.h>
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#include <v2m_def.h>
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#include "../../../../drivers/arm/gic/v3/gicv3_private.h"
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#include "drivers/pwrc/fvp_pwrc.h"
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#include "fvp_def.h"
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#include "fvp_private.h"
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@ -123,7 +124,7 @@ static void fvp_power_domain_on_finish_common(const psci_power_state_t *target_s
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/*******************************************************************************
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* FVP handler called when a CPU is about to enter standby.
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******************************************************************************/
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void fvp_cpu_standby(plat_local_state_t cpu_state)
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static void fvp_cpu_standby(plat_local_state_t cpu_state)
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{
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assert(cpu_state == ARM_LOCAL_STATE_RET);
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@ -140,7 +141,7 @@ void fvp_cpu_standby(plat_local_state_t cpu_state)
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* FVP handler called when a power domain is about to be turned on. The
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* mpidr determines the CPU to be turned on.
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******************************************************************************/
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int fvp_pwr_domain_on(u_register_t mpidr)
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static int fvp_pwr_domain_on(u_register_t mpidr)
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{
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int rc = PSCI_E_SUCCESS;
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unsigned int psysr;
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@ -162,7 +163,7 @@ int fvp_pwr_domain_on(u_register_t mpidr)
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* FVP handler called when a power domain is about to be turned off. The
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* target_state encodes the power state that each level should transition to.
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******************************************************************************/
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void fvp_pwr_domain_off(const psci_power_state_t *target_state)
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static void fvp_pwr_domain_off(const psci_power_state_t *target_state)
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{
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assert(target_state->pwr_domain_state[ARM_PWR_LVL0] ==
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ARM_LOCAL_STATE_OFF);
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@ -192,7 +193,7 @@ void fvp_pwr_domain_off(const psci_power_state_t *target_state)
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* FVP handler called when a power domain is about to be suspended. The
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* target_state encodes the power state that each level should transition to.
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******************************************************************************/
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void fvp_pwr_domain_suspend(const psci_power_state_t *target_state)
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static void fvp_pwr_domain_suspend(const psci_power_state_t *target_state)
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{
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unsigned long mpidr;
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@ -241,7 +242,7 @@ void fvp_pwr_domain_suspend(const psci_power_state_t *target_state)
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* being turned off earlier. The target_state encodes the low power state that
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* each level has woken up from.
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******************************************************************************/
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void fvp_pwr_domain_on_finish(const psci_power_state_t *target_state)
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static void fvp_pwr_domain_on_finish(const psci_power_state_t *target_state)
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{
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fvp_power_domain_on_finish_common(target_state);
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@ -259,7 +260,7 @@ void fvp_pwr_domain_on_finish(const psci_power_state_t *target_state)
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* TODO: At the moment we reuse the on finisher and reinitialize the secure
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* context. Need to implement a separate suspend finisher.
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******************************************************************************/
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void fvp_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
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static void fvp_pwr_domain_suspend_finish(const psci_power_state_t *target_state)
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{
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/*
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* Nothing to be done on waking up from retention from CPU level.
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@ -341,13 +342,15 @@ static int fvp_node_hw_state(u_register_t target_cpu,
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* layer. The `fake` SYSTEM_SUSPEND allows us to validate some of the driver
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* save and restore sequences on FVP.
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*/
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void fvp_get_sys_suspend_power_state(psci_power_state_t *req_state)
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#if !ARM_BL31_IN_DRAM
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static void fvp_get_sys_suspend_power_state(psci_power_state_t *req_state)
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{
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unsigned int i;
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for (i = ARM_PWR_LVL0; i <= PLAT_MAX_PWR_LVL; i++)
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req_state->pwr_domain_state[i] = ARM_LOCAL_STATE_OFF;
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}
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#endif
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/*******************************************************************************
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* Handler to filter PSCI requests.
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -8,11 +8,12 @@
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#include <arm_config.h>
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#include <cassert.h>
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#include <plat_arm.h>
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#include <platform.h>
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#include <platform_def.h>
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#include "drivers/pwrc/fvp_pwrc.h"
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/* The FVP power domain tree descriptor */
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unsigned char fvp_power_domain_tree_desc[FVP_CLUSTER_COUNT + 2];
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static unsigned char fvp_power_domain_tree_desc[FVP_CLUSTER_COUNT + 2];
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CASSERT(FVP_CLUSTER_COUNT && FVP_CLUSTER_COUNT <= 256, assert_invalid_fvp_cluster_count);
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -7,6 +7,7 @@
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#include <assert.h>
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#include <stdint.h>
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#include <string.h>
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#include <platform.h>
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#include <tbbr_oid.h>
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#include "fvp_def.h"
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@ -7,9 +7,11 @@
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#include <arch.h>
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#include <arm_def.h>
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#include <arm_xlat_tables.h>
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#include <bl1.h>
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#include <bl_common.h>
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#include <console.h>
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#include <plat_arm.h>
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#include <platform.h>
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#include <platform_def.h>
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#include <sp805.h>
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#include <utils.h>
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
|
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* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -10,6 +10,7 @@
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#include <console.h>
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#include <plat_arm.h>
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#include <platform_def.h>
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#include <platform.h>
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#include <string.h>
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/* Weak definitions may be overridden in specific ARM standard platform */
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@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
@ -11,6 +11,7 @@
|
||||
#include <mmio.h>
|
||||
#include <plat_arm.h>
|
||||
#include <platform_def.h>
|
||||
#include <platform.h>
|
||||
#include <secure_partition.h>
|
||||
|
||||
extern const mmap_region_t plat_arm_mmap[];
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
@ -35,8 +35,8 @@ static const interrupt_prop_t arm_interrupt_props[] = {
|
||||
* We save and restore the GICv3 context on system suspend. Allocate the
|
||||
* data in the designated EL3 Secure carve-out memory
|
||||
*/
|
||||
gicv3_redist_ctx_t rdist_ctx __section("arm_el3_tzc_dram");
|
||||
gicv3_dist_ctx_t dist_ctx __section("arm_el3_tzc_dram");
|
||||
static gicv3_redist_ctx_t rdist_ctx __section("arm_el3_tzc_dram");
|
||||
static gicv3_dist_ctx_t dist_ctx __section("arm_el3_tzc_dram");
|
||||
|
||||
/*
|
||||
* MPIDR hashing function for translating MPIDRs read from GICR_TYPER register
|
||||
@ -58,7 +58,7 @@ static unsigned int arm_gicv3_mpidr_hash(u_register_t mpidr)
|
||||
return plat_arm_calc_core_pos(mpidr);
|
||||
}
|
||||
|
||||
const gicv3_driver_data_t arm_gic_data = {
|
||||
static const gicv3_driver_data_t arm_gic_data __unused = {
|
||||
.gicd_base = PLAT_ARM_GICD_BASE,
|
||||
.gicr_base = PLAT_ARM_GICR_BASE,
|
||||
.interrupt_props = arm_interrupt_props,
|
||||
|
@ -10,6 +10,8 @@
|
||||
#include <io_fip.h>
|
||||
#include <io_memmap.h>
|
||||
#include <io_storage.h>
|
||||
#include <plat_arm.h>
|
||||
#include <platform.h>
|
||||
#include <platform_def.h>
|
||||
#include <string.h>
|
||||
#include <utils.h>
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
@ -12,7 +12,7 @@
|
||||
#include <psci.h>
|
||||
#include <utils.h>
|
||||
|
||||
mem_region_t arm_ram_ranges[] = {
|
||||
static mem_region_t arm_ram_ranges[] = {
|
||||
{ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_SIZE},
|
||||
#ifdef AARCH64
|
||||
{ARM_DRAM2_BASE, ARM_DRAM2_SIZE},
|
||||
|
@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
|
||||
* Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
|
||||
*
|
||||
* SPDX-License-Identifier: BSD-3-Clause
|
||||
*/
|
||||
@ -7,6 +7,7 @@
|
||||
#include <arm_def.h>
|
||||
#include <arm_spm_def.h>
|
||||
#include <debug.h>
|
||||
#include <plat_arm.h>
|
||||
#include <platform_def.h>
|
||||
#include <tzc400.h>
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user