CTCaer/switch-l4t-atf
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Fix boot failures on some builds linked with ld.lld.

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Pad the .rodata section to 16 bytes as ld.lld does not apply the ALIGN
statement on the .data section to the LMA. Fixes boot failure on builds
where the .rodata section happens to not be 16 bytes aligned.

Change-Id: I4e95678f73d8b326c5fc749dc7d0ce84e2d603f5
Signed-off-by: Arve Hjønnevåg <arve@android.com>
This commit is contained in:
Arve Hjønnevåg 2020-02-07 14:12:35 -08:00
parent 76776c2c67
commit 4128659076
1 changed files with 12 additions and 0 deletions
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12
bl1/bl1.ld.S
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@ -65,8 +65,13 @@ SECTIONS
* No need to pad out the .rodata section to a page boundary. Next is
* the .data section, which can mapped in ROM with the same memory
* attributes as the .rodata section.
*
* Pad out to 16 bytes though as .data section needs to be 16 byte
* aligned and lld does not align the LMA to the aligment specified
* on the .data section.
*/
__RODATA_END__ = .;
. = ALIGN(16);
} >ROM
#else
ro . : {
@ -92,6 +97,13 @@ SECTIONS
*(.vectors)
__RO_END__ = .;
/*
* Pad out to 16 bytes as .data section needs to be 16 byte aligned and
* lld does not align the LMA to the aligment specified on the .data
* section.
*/
. = ALIGN(16);
} >ROM
#endif