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refactor(plat/arm): modify memory region attributes to account for FEAT_RME

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If FEAT_RME is enabled, EL3 runs in the Root world as opposed to
Secure world. This patch changes EL3 memory region attributes for
Arm platforms accordingly.

Signed-off-by: Zelalem Aweke <zelalem.aweke@arm.com>
Change-Id: Ie176f8b440ff34330e4e44bd3bf8d9703b3892ff
This commit is contained in:
Zelalem Aweke 2021-07-12 22:33:55 -05:00
parent 9d870b79c1
commit 4bb72c47dd
4 changed files with 24 additions and 18 deletions
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20
include/plat/arm/common/arm_def.h
View File

@ -209,7 +209,7 @@
#define ARM_MAP_SHARED_RAM MAP_REGION_FLAT( \
ARM_SHARED_RAM_BASE, \
ARM_SHARED_RAM_SIZE, \
MT_DEVICE | MT_RW | MT_SECURE)
MT_DEVICE | MT_RW | EL3_PAS)
#define ARM_MAP_NS_DRAM1 MAP_REGION_FLAT( \
ARM_NS_DRAM1_BASE, \
@ -236,7 +236,7 @@
#define ARM_MAP_EL3_TZC_DRAM MAP_REGION_FLAT( \
ARM_EL3_TZC_DRAM1_BASE, \
ARM_EL3_TZC_DRAM1_SIZE, \
MT_MEMORY | MT_RW | MT_SECURE)
MT_MEMORY | MT_RW | EL3_PAS)
#if defined(SPD_spmd)
#define ARM_MAP_TRUSTED_DRAM MAP_REGION_FLAT( \
@ -255,7 +255,7 @@
#define ARM_MAP_BL1_RW MAP_REGION_FLAT( \
BL1_RW_BASE, \
BL1_RW_LIMIT - BL1_RW_BASE, \
MT_MEMORY | MT_RW | MT_SECURE)
MT_MEMORY | MT_RW | EL3_PAS)
/*
* If SEPARATE_CODE_AND_RODATA=1 we define a region for each section
@ -265,35 +265,35 @@
#define ARM_MAP_BL_RO MAP_REGION_FLAT( \
BL_CODE_BASE, \
BL_CODE_END - BL_CODE_BASE, \
MT_CODE | MT_SECURE), \
MT_CODE | EL3_PAS), \
MAP_REGION_FLAT( \
BL_RO_DATA_BASE, \
BL_RO_DATA_END \
- BL_RO_DATA_BASE, \
MT_RO_DATA | MT_SECURE)
MT_RO_DATA | EL3_PAS)
#else
#define ARM_MAP_BL_RO MAP_REGION_FLAT( \
BL_CODE_BASE, \
BL_CODE_END - BL_CODE_BASE, \
MT_CODE | MT_SECURE)
MT_CODE | EL3_PAS)
#endif
#if USE_COHERENT_MEM
#define ARM_MAP_BL_COHERENT_RAM MAP_REGION_FLAT( \
BL_COHERENT_RAM_BASE, \
BL_COHERENT_RAM_END \
- BL_COHERENT_RAM_BASE, \
MT_DEVICE | MT_RW | MT_SECURE)
MT_DEVICE | MT_RW | EL3_PAS)
#endif
#if USE_ROMLIB
#define ARM_MAP_ROMLIB_CODE MAP_REGION_FLAT( \
ROMLIB_RO_BASE, \
ROMLIB_RO_LIMIT - ROMLIB_RO_BASE,\
MT_CODE | MT_SECURE)
MT_CODE | EL3_PAS)
#define ARM_MAP_ROMLIB_DATA MAP_REGION_FLAT( \
ROMLIB_RW_BASE, \
ROMLIB_RW_END - ROMLIB_RW_BASE,\
MT_MEMORY | MT_RW | MT_SECURE)
MT_MEMORY | MT_RW | EL3_PAS)
#endif
/*
@ -308,7 +308,7 @@
#define ARM_MAP_BL_CONFIG_REGION MAP_REGION_FLAT(ARM_BL_RAM_BASE, \
(ARM_FW_CONFIGS_LIMIT \
- ARM_BL_RAM_BASE), \
MT_MEMORY | MT_RW | MT_SECURE)
MT_MEMORY | MT_RW | EL3_PAS)
/*
* The max number of regions like RO(code), coherent and data required by

8
plat/arm/common/arm_bl1_setup.c
View File

@ -32,7 +32,7 @@
#define MAP_BL1_TOTAL MAP_REGION_FLAT( \
bl1_tzram_layout.total_base, \
bl1_tzram_layout.total_size, \
MT_MEMORY | MT_RW | MT_SECURE)
MT_MEMORY | MT_RW | EL3_PAS)
/*
* If SEPARATE_CODE_AND_RODATA=1 we define a region for each section
* otherwise one region is defined containing both
@ -41,17 +41,17 @@
#define MAP_BL1_RO MAP_REGION_FLAT( \
BL_CODE_BASE, \
BL1_CODE_END - BL_CODE_BASE, \
MT_CODE | MT_SECURE), \
MT_CODE | EL3_PAS), \
MAP_REGION_FLAT( \
BL1_RO_DATA_BASE, \
BL1_RO_DATA_END \
- BL_RO_DATA_BASE, \
MT_RO_DATA | MT_SECURE)
MT_RO_DATA | EL3_PAS)
#else
#define MAP_BL1_RO MAP_REGION_FLAT( \
BL_CODE_BASE, \
BL1_CODE_END - BL_CODE_BASE, \
MT_CODE | MT_SECURE)
MT_CODE | EL3_PAS)
#endif
/* Data structure which holds the extents of the trusted SRAM for BL1*/

8
plat/arm/common/arm_bl2_setup.c
View File

@ -45,11 +45,17 @@ CASSERT(BL2_BASE >= ARM_FW_CONFIG_LIMIT, assert_bl2_base_overflows);
#pragma weak bl2_plat_get_hash
#endif
#if ENABLE_RME
#define MAP_BL2_TOTAL MAP_REGION_FLAT( \
bl2_tzram_layout.total_base, \
bl2_tzram_layout.total_size, \
MT_MEMORY | MT_RW | MT_ROOT)
#else
#define MAP_BL2_TOTAL MAP_REGION_FLAT( \
bl2_tzram_layout.total_base, \
bl2_tzram_layout.total_size, \
MT_MEMORY | MT_RW | MT_SECURE)
#endif /* ENABLE_RME */
#pragma weak arm_bl2_plat_handle_post_image_load

6
plat/arm/common/arm_bl31_setup.c
View File

@ -46,7 +46,7 @@ CASSERT(BL31_BASE >= ARM_FW_CONFIG_LIMIT, assert_bl31_base_overflows);
#define MAP_BL31_TOTAL MAP_REGION_FLAT( \
BL31_START, \
BL31_END - BL31_START, \
MT_MEMORY | MT_RW | MT_SECURE)
MT_MEMORY | MT_RW | EL3_PAS)
#if RECLAIM_INIT_CODE
IMPORT_SYM(unsigned long, __INIT_CODE_START__, BL_INIT_CODE_BASE);
IMPORT_SYM(unsigned long, __INIT_CODE_END__, BL_CODE_END_UNALIGNED);
@ -61,7 +61,7 @@ IMPORT_SYM(unsigned long, __STACKS_END__, BL_STACKS_END_UNALIGNED);
BL_INIT_CODE_BASE, \
BL_INIT_CODE_END \
- BL_INIT_CODE_BASE, \
MT_CODE | MT_SECURE)
MT_CODE | EL3_PAS)
#endif
#if SEPARATE_NOBITS_REGION
@ -69,7 +69,7 @@ IMPORT_SYM(unsigned long, __STACKS_END__, BL_STACKS_END_UNALIGNED);
BL31_NOBITS_BASE, \
BL31_NOBITS_LIMIT \
- BL31_NOBITS_BASE, \
MT_MEMORY | MT_RW | MT_SECURE)
MT_MEMORY | MT_RW | EL3_PAS)
#endif
/*******************************************************************************