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Merge pull request #1126 from robertovargas-arm/psci-v1.1
Update PSCI to v1.1
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davidcunado-arm
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5d2f87e850
@ -886,10 +886,10 @@ Power State Coordination Interface
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TODO: Provide design walkthrough of PSCI implementation.
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The PSCI v1.0 specification categorizes APIs as optional and mandatory. All the
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mandatory APIs in PSCI v1.0 and all the APIs in PSCI v0.2 draft specification
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The PSCI v1.1 specification categorizes APIs as optional and mandatory. All the
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mandatory APIs in PSCI v1.1, PSCI v1.0 and in PSCI v0.2 draft specification
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`Power State Coordination Interface PDD`_ are implemented. The table lists
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the PSCI v1.0 APIs and their support in generic code.
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the PSCI v1.1 APIs and their support in generic code.
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An API implementation might have a dependency on platform code e.g. CPU\_SUSPEND
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requires the platform to export a part of the implementation. Hence the level
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@ -898,9 +898,9 @@ platform port as well. The Juno and FVP (all variants) platforms export all the
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required support.
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+-----------------------------+-------------+-------------------------------+
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| PSCI v1.0 API | Supported | Comments |
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| PSCI v1.1 API | Supported | Comments |
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+=============================+=============+===============================+
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| ``PSCI_VERSION`` | Yes | The version returned is 1.0 |
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| ``PSCI_VERSION`` | Yes | The version returned is 1.1 |
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+-----------------------------+-------------+-------------------------------+
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| ``CPU_SUSPEND`` | Yes\* | |
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+-----------------------------+-------------+-------------------------------+
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@ -936,6 +936,12 @@ required support.
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+-----------------------------+-------------+-------------------------------+
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| ``PSCI_STAT_COUNT`` | Yes\* | |
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+-----------------------------+-------------+-------------------------------+
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| ``SYSTEM_RESET2`` | Yes\* | |
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+-----------------------------+-------------+-------------------------------+
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| ``MEM_PROTECT`` | Yes\* | |
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+-----------------------------+-------------+-------------------------------+
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| ``MEM_PROTECT_CHECK_RANGE`` | Yes\* | |
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+-----------------------------+-------------+-------------------------------+
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\*Note : These PSCI APIs require platform power management hooks to be
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registered with the generic PSCI code to be supported.
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@ -158,6 +158,17 @@ for the ``plat_psci_ops`` structure which is declared as :
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int (*validate_ns_entrypoint)(unsigned long ns_entrypoint);
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void (*get_sys_suspend_power_state)(
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psci_power_state_t *req_state);
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int (*get_pwr_lvl_state_idx)(plat_local_state_t pwr_domain_state,
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int pwrlvl);
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int (*translate_power_state_by_mpidr)(u_register_t mpidr,
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unsigned int power_state,
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psci_power_state_t *output_state);
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int (*get_node_hw_state)(u_register_t mpidr, unsigned int power_level);
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int (*mem_protect_chk)(uintptr_t base, u_register_t length);
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int (*read_mem_protect)(int *val);
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int (*write_mem_protect)(int val);
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int (*system_reset2)(int is_vendor,
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int reset_type, u_register_t cookie);
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} plat_psci_ops_t;
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The description of these handlers can be found in the `Porting Guide <porting-guide.rst#user-content-function--plat_setup_psci_ops-mandatory>`__.
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@ -2271,6 +2271,44 @@ appropriate.
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Implementations are not expected to handle ``power_levels`` greater than
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``PLAT_MAX_PWR_LVL``.
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plat\_psci\_ops.system\_reset2()
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................................
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This is an optional function. If implemented this function is
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called during the ``SYSTEM_RESET2`` call to perform a reset
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based on the first parameter ``reset_type`` as specified in
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`PSCI`_. The parameter ``cookie`` can be used to pass additional
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reset information. If the ``reset_type`` is not supported, the
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function must return ``PSCI_E_NOT_SUPPORTED``. For architectural
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resets, all failures must return ``PSCI_E_INVALID_PARAMETERS``
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and vendor reset can return other PSCI error codes as defined
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in `PSCI`_. On success this function will not return.
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plat\_psci\_ops.write\_mem\_protect()
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....................................
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This is an optional function. If implemented it enables or disables the
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``MEM_PROTECT`` functionality based on the value of ``val``.
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A non-zero value enables ``MEM_PROTECT`` and a value of zero
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disables it. Upon encountering failures it must return a negative value
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and on success it must return 0.
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plat\_psci\_ops.read\_mem\_protect()
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.....................................
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This is an optional function. If implemented it returns the current
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state of ``MEM_PROTECT`` via the ``val`` parameter. Upon encountering
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failures it must return a negative value and on success it must
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return 0.
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plat\_psci\_ops.mem\_protect\_chk()
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...................................
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This is an optional function. If implemented it checks if a memory
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region defined by a base address ``base`` and with a size of ``length``
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bytes is protected by ``MEM_PROTECT``. If the region is protected
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then it must return 0, otherwise it must return a negative number.
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Interrupt Management framework (in BL31)
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----------------------------------------
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@ -151,7 +151,7 @@
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* PSCI version
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******************************************************************************/
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#define PSCI_MAJOR_VER (U(1) << 16)
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#define PSCI_MINOR_VER U(0x0)
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#define PSCI_MINOR_VER U(0x1)
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/*******************************************************************************
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* PSCI error codes
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@ -90,7 +90,8 @@
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define_psci_cap(PSCI_SYSTEM_SUSPEND_AARCH64) | \
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define_psci_cap(PSCI_STAT_RESIDENCY_AARCH64) | \
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define_psci_cap(PSCI_STAT_COUNT_AARCH64) | \
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define_psci_cap(PSCI_SYSTEM_RESET2_AARCH64))
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define_psci_cap(PSCI_SYSTEM_RESET2_AARCH64) | \
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define_psci_cap(PSCI_MEM_CHK_RANGE_AARCH64))
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/*
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* Helper macros to get/set the fields of PSCI per-cpu data.
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