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errata: workaround for Neoverse N2 erratum 2067956

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Neoverse N2 erratum 2067956 is a Cat B erratum that applies to
revision r0p0 and is still open. The workaround is to set
CPUACTLR_EL1[46] to force L2 tag ECC inline correction mode.
This workaround works on revision r0p0.

SDEN can be found here:
https://developer.arm.com/documentation/SDEN1982442/latest

Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: Ie92d18a379c66675b5c1c50fd0b8dde130848b21
This commit is contained in:
Bipin Ravi 2021-03-30 16:08:32 -05:00
parent 3c9962a1c0
commit 65e04f27d4
4 changed files with 55 additions and 4 deletions
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5
docs/design/cpu-specific-build-macros.rst
View File

@ -378,6 +378,11 @@ For Cortex-A710, the following errata build flags are defined :
Cortex-A710 CPU. This needs to be enabled only for revisions r0p0, r1p0 and
r2p0 of the CPU. It is still open.
For Neoverse N2, the following errata build flags are defined :
- ``ERRATA_N2_2067956``: This applies errata 2067956 workaround to Neoverse-N2
CPU. This needs to be enabled for revision r0p0 of the CPU and is still open.
DSU Errata Workarounds
----------------------

6
include/lib/cpus/aarch64/neoverse_n2.h
View File

@ -25,6 +25,12 @@
/*******************************************************************************
* CPU Auxiliary Control register specific definitions.
******************************************************************************/
#define NEOVERSE_N2_CPUACTLR_EL1 S3_0_C15_C1_0
#define NEOVERSE_N2_CPUACTLR_EL1_BIT_46 (ULL(1) << 46)
/*******************************************************************************
* CPU Auxiliary Control register 2 specific definitions.
******************************************************************************/
#define NEOVERSE_N2_CPUACTLR2_EL1 S3_0_C15_C1_1
#define NEOVERSE_N2_CPUACTLR2_EL1_BIT_2 (ULL(1) << 2)

40
lib/cpus/aarch64/neoverse_n2.S
View File

@ -61,6 +61,32 @@ func check_errata_2002655
b cpu_rev_var_ls
endfunc check_errata_2002655
/* ---------------------------------------------------------------
* Errata Workaround for Neoverse N2 Erratum 2067956.
* This applies to revision r0p0 of Neoverse N2 and is still open.
* Inputs:
* x0: variant[4:7] and revision[0:3] of current cpu.
* Shall clobber: x0-x17
* ---------------------------------------------------------------
*/
func errata_n2_2067956_wa
/* Compare x0 against revision r0p0 */
mov x17, x30
bl check_errata_2067956
cbz x0, 1f
mrs x1, NEOVERSE_N2_CPUACTLR_EL1
orr x1, x1, NEOVERSE_N2_CPUACTLR_EL1_BIT_46
msr NEOVERSE_N2_CPUACTLR_EL1, x1
1:
ret x17
endfunc errata_n2_2067956_wa
func check_errata_2067956
/* Applies to r0p0 */
mov x1, #0x00
b cpu_rev_var_ls
endfunc check_errata_2067956
/* -------------------------------------------------
* The CPU Ops reset function for Neoverse N2.
* -------------------------------------------------
@ -81,6 +107,11 @@ func neoverse_n2_reset_func
orr x0, x0, #NEOVERSE_N2_CPUACTLR2_EL1_BIT_2
msr NEOVERSE_N2_CPUACTLR2_EL1, x0
#if ERRATA_N2_2067956
mov x0, x18
bl errata_n2_2067956_wa
#endif
#if ENABLE_AMU
/* Make sure accesses from EL0/EL1 and EL2 are not trapped to EL3 */
mrs x0, cptr_el3
@ -97,9 +128,9 @@ func neoverse_n2_reset_func
#if NEOVERSE_Nx_EXTERNAL_LLC
/* Some systems may have External LLC, core needs to be made aware */
mrs x0, NEOVERSE_N2_CPUECTLR_EL1
orr x0, x0, NEOVERSE_N2_CPUECTLR_EL1_EXTLLC_BIT
msr NEOVERSE_N2_CPUECTLR_EL1, x0
mrs x0, NEOVERSE_N2_CPUECTLR_EL1
orr x0, x0, NEOVERSE_N2_CPUECTLR_EL1_EXTLLC_BIT
msr NEOVERSE_N2_CPUECTLR_EL1, x0
#endif
bl cpu_get_rev_var
@ -111,7 +142,7 @@ func neoverse_n2_reset_func
#endif
isb
ret x19
ret x19
endfunc neoverse_n2_reset_func
func neoverse_n2_core_pwr_dwn
@ -142,6 +173,7 @@ func neoverse_n2_errata_report
* checking functions of each errata.
*/
report_errata ERRATA_N2_2002655, neoverse_n2, 2002655
report_errata ERRATA_N2_2067956, neoverse_n2, 2067956
ldp x8, x30, [sp], #16
ret

8
lib/cpus/cpu-ops.mk
View File

@ -421,6 +421,10 @@ ERRATA_A710_1987031 ?=0
# to revisions r0p0, r1p0 and r2p0 of the Cortex-A710 cpu and is still open.
ERRATA_A710_2081180 ?=0
# Flag to apply erratum 2067956 workaround during reset. This erratum applies
# to revision r0p0 of the Neoverse N2 cpu and is still open.
ERRATA_N2_2067956 ?=0
# Flag to apply DSU erratum 798953. This erratum applies to DSUs revision r0p0.
# Applying the workaround results in higher DSU power consumption on idle.
ERRATA_DSU_798953 ?=0
@ -774,6 +778,10 @@ $(eval $(call add_define,ERRATA_A710_1987031))
$(eval $(call assert_boolean,ERRATA_A710_2081180))
$(eval $(call add_define,ERRATA_A710_2081180))
# Process ERRATA_N2_2067956 flag
$(eval $(call assert_boolean,ERRATA_N2_2067956))
$(eval $(call add_define,ERRATA_N2_2067956))
# Process ERRATA_DSU_798953 flag
$(eval $(call assert_boolean,ERRATA_DSU_798953))
$(eval $(call add_define,ERRATA_DSU_798953))