mirror of
https://github.com/CTCaer/switch-l4t-atf.git
synced 2025-02-01 07:45:29 +00:00
rockchip: check wakeup cpu when resume
unlike rk3399 and rk3368, there are some rockchip 64bit SOC do not have CPUPD, and pmu_cpuson_entrypoint() is common function for rockchip platform, so we need to check wakeup cpu when resume. Change-Id: I6313e8a9d7c16b03e033414f0cb281646c2159ff Signed-off-by: Lin Huang <hl@rock-chips.com>
This commit is contained in:
parent
4e836d3578
commit
84597b57f9
@ -19,6 +19,28 @@
|
||||
|
||||
pmusram_entry_func pmu_cpuson_entrypoint
|
||||
|
||||
#if PSRAM_CHECK_WAKEUP_CPU
|
||||
check_wake_cpus:
|
||||
mrs x0, MPIDR_EL1
|
||||
and x1, x0, #MPIDR_CPU_MASK
|
||||
and x0, x0, #MPIDR_CLUSTER_MASK
|
||||
orr x0, x0, x1
|
||||
|
||||
/* primary_cpu */
|
||||
ldr w1, boot_mpidr
|
||||
cmp w0, w1
|
||||
b.eq sys_wakeup
|
||||
|
||||
/*
|
||||
* If the core is not the primary cpu,
|
||||
* force the core into wfe.
|
||||
*/
|
||||
wfe_loop:
|
||||
wfe
|
||||
b wfe_loop
|
||||
sys_wakeup:
|
||||
#endif
|
||||
|
||||
#if PSRAM_DO_DDR_RESUME
|
||||
ddr_resume:
|
||||
ldr x2, =__bl31_sram_stack_end
|
||||
|
@ -121,5 +121,6 @@
|
||||
#define PLAT_RK_PRIMARY_CPU 0x0
|
||||
|
||||
#define PSRAM_DO_DDR_RESUME 0
|
||||
#define PSRAM_CHECK_WAKEUP_CPU 0
|
||||
|
||||
#endif /* __PLATFORM_DEF_H__ */
|
||||
|
@ -123,5 +123,6 @@
|
||||
#define PLAT_RK_PRIMARY_CPU 0x0
|
||||
|
||||
#define PSRAM_DO_DDR_RESUME 0
|
||||
#define PSRAM_CHECK_WAKEUP_CPU 0
|
||||
|
||||
#endif /* __PLATFORM_DEF_H__ */
|
||||
|
@ -108,4 +108,6 @@
|
||||
#define PLAT_RK_PRIMARY_CPU 0x0
|
||||
|
||||
#define PSRAM_DO_DDR_RESUME 1
|
||||
#define PSRAM_CHECK_WAKEUP_CPU 0
|
||||
|
||||
#endif /* __PLATFORM_DEF_H__ */
|
||||
|
Loading…
x
Reference in New Issue
Block a user