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refactor(fdts stm32mp1): move STM32MP DDR node

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Move the generic part of DDR node in SOC dtsi file.
DDR dtsi files only include the part configured by CubeMX tool.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Change-Id: I8c211e9782604da32aeaab98d0ef75fb1cd9c58d
This commit is contained in:
Nicolas Le Bayon 2021-02-25 11:03:53 +01:00 committed by Yann Gautier
parent e8a953a9b8
commit 8cafbda6d3
2 changed files with 133 additions and 141 deletions
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30
fdts/stm32mp15-ddr.dtsi
View File

@ -1,31 +1,9 @@
// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
/*
* Copyright (C) 2018, STMicroelectronics - All Rights Reserved
* Copyright (C) 2018-2021, STMicroelectronics - All Rights Reserved
*/
/ {
soc {
ddr: ddr@5a003000{
compatible = "st,stm32mp1-ddr";
reg = <0x5A003000 0x550
0x5A004000 0x234>;
clocks = <&rcc AXIDCG>,
<&rcc DDRC1>,
<&rcc DDRC2>,
<&rcc DDRPHYC>,
<&rcc DDRCAPB>,
<&rcc DDRPHYCAPB>;
clock-names = "axidcg",
"ddrc1",
"ddrc2",
"ddrphyc",
"ddrcapb",
"ddrphycapb";
&ddr {
st,mem-name = DDR_MEM_NAME;
st,mem-speed = <DDR_MEM_SPEED>;
st,mem-size = <DDR_MEM_SIZE>;
@ -146,8 +124,4 @@
DDR_DX3DQTR
DDR_DX3DQSTR
>;
status = "okay";
};
};
};

18
fdts/stm32mp151.dtsi
View File

@ -358,6 +358,24 @@
status = "disabled";
};
ddr: ddr@5a003000{
compatible = "st,stm32mp1-ddr";
reg = <0x5A003000 0x550 0x5A004000 0x234>;
clocks = <&rcc AXIDCG>,
<&rcc DDRC1>,
<&rcc DDRC2>,
<&rcc DDRPHYC>,
<&rcc DDRCAPB>,
<&rcc DDRPHYCAPB>;
clock-names = "axidcg",
"ddrc1",
"ddrc2",
"ddrphyc",
"ddrcapb",
"ddrphycapb";
status = "okay";
};
usbphyc: usbphyc@5a006000 {
#address-cells = <1>;
#size-cells = <0>;