CTCaer/switch-l4t-atf
1
0
Fork 0
mirror of https://github.com/CTCaer/switch-l4t-atf.git synced 2024-11-27 03:40:22 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

plat: xilinx: zynqmp: Configure counter frequency during initialization

Browse Source 
Counter frequency for generic timer of Arm-A53 based Application
Processing Unit(APU) is not configuring in case if First Stage Boot
Loader(FSBL) does not initialize counter frequency. This happens
when FSBL is running from Arm-R5 based Real-time Processing Unit(RPU).
Because of that generic timer driver functionality is not working.
So configure counter frequency during initialization.

Signed-off-by: Rajan Vaja <rajan.vaja@xilinx.com>
Change-Id: Icfccd59d7d2340fba25ebfb2ef6a813af4290896
This commit is contained in:
Rajan Vaja 2021-03-26 04:16:36 -07:00 committed by Manish Pandey
parent 89a05821ec
commit 9f0ddae317
2 changed files with 12 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
plat/xilinx/zynqmp/aarch64/zynqmp_common.c
View File

@ -350,10 +350,19 @@ unsigned int zynqmp_get_bootmode(void)
void zynqmp_config_setup(void)
{
uint64_t counter_freq;
/* Configure IPI data for ZynqMP */
zynqmp_ipi_config_table_init();
zynqmp_print_platform_name();
/* Configure counter frequency */
counter_freq = read_cntfrq_el0();
if (counter_freq == ZYNQMP_DEFAULT_COUNTER_FREQ) {
write_cntfrq_el0(plat_get_syscnt_freq2());
}
generic_delay_timer_init();
}

3
plat/xilinx/zynqmp/include/zynqmp_def.h
View File

@ -17,6 +17,9 @@
#define ZYNQMP_CONSOLE_IS(con) (ZYNQMP_CONSOLE_ID_ ## con == ZYNQMP_CONSOLE)
/* Default counter frequency */
#define ZYNQMP_DEFAULT_COUNTER_FREQ 0U
/* Firmware Image Package */
#define ZYNQMP_PRIMARY_CPU 0