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Apply workarounds for A53 Cat A Errata 835769 and 843419
These errata are only applicable to AArch64 state. See the errata notice for more details: http://infocenter.arm.com/help/index.jsp?topic=/com.arm.doc.epm048406/index.html Introduce the build options ERRATA_A53_835769 and ERRATA_A53_843419. Enable both of them for Juno. Apply the 835769 workaround as following: * Compile with -mfix-cortex-a53-835769 * Link with --fix-cortex-a53-835769 Apply the 843419 workaround as following: * Link with --fix-cortex-a53-843419 The erratum 843419 workaround can lead the linker to create new sections suffixed with "*.stub*" and 4KB aligned. The erratum 835769 can lead the linker to create new "*.stub" sections with no particular alignment. Also add support for LDFLAGS_aarch32 and LDFLAGS_aarch64 in Makefile for architecture-specific linker options. Change-Id: Iab3337e338b7a0a16b0d102404d9db98c154f8f8 Signed-off-by: Douglas Raillard <douglas.raillard@arm.com>
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3705cd47b2
commit
a94cc374ab
1
Makefile
1
Makefile
@ -151,6 +151,7 @@ TF_CFLAGS += $(CPPFLAGS) $(TF_CFLAGS_$(ARCH)) \
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-ffreestanding -fno-builtin -Wall -std=gnu99 \
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-Os -ffunction-sections -fdata-sections
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LDFLAGS += $(LDFLAGS_$(ARCH))
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LDFLAGS += --fatal-warnings -O1
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LDFLAGS += --gc-sections
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@ -138,6 +138,26 @@ func check_errata_855873
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b cpu_rev_var_hs
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endfunc check_errata_855873
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/*
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* Errata workaround for Cortex A53 Errata #835769.
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* This applies to revisions <= r0p4 of Cortex A53.
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* This workaround is statically enabled at build time.
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*/
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func check_errata_835769
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mov x1, #0x04
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b cpu_rev_var_ls
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endfunc check_errata_835769
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/*
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* Errata workaround for Cortex A53 Errata #843419.
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* This applies to revisions <= r0p4 of Cortex A53.
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* This workaround is statically enabled at build time.
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*/
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func check_errata_843419
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mov x1, #0x04
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b cpu_rev_var_ls
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endfunc check_errata_843419
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/* -------------------------------------------------
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* The CPU Ops reset function for Cortex-A53.
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* Shall clobber: x0-x19
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@ -251,7 +271,9 @@ func cortex_a53_errata_report
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* checking functions of each errata.
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*/
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report_errata ERRATA_A53_826319, cortex_a53, 826319
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report_errata ERRATA_A53_835769, cortex_a53, 835769
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report_errata ERRATA_A53_836870, cortex_a53, disable_non_temporal_hint
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report_errata ERRATA_A53_843419, cortex_a53, 843419
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report_errata ERRATA_A53_855873, cortex_a53, 855873
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ldp x8, x30, [sp], #16
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@ -1,5 +1,5 @@
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#
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# Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
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# Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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@ -37,11 +37,22 @@ $(eval $(call add_define,A57_DISABLE_NON_TEMPORAL_HINT))
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# only to revision <= r0p2 of the Cortex A53 cpu.
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ERRATA_A53_826319 ?=0
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# Flag to apply erratum 835769 workaround at compile and link time. This
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# erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
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# workaround can lead the linker to create "*.stub" sections.
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ERRATA_A53_835769 ?=0
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# Flag to apply erratum 836870 workaround during reset. This erratum applies
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# only to revision <= r0p3 of the Cortex A53 cpu. From r0p4 and onwards, this
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# erratum workaround is enabled by default in hardware.
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ERRATA_A53_836870 ?=0
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# Flag to apply erratum 843419 workaround at link time.
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# This erratum applies to revision <= r0p4 of the Cortex A53 cpu. Enabling this
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# workaround could lead the linker to emit "*.stub" sections which are 4kB
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# aligned.
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ERRATA_A53_843419 ?=0
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# Flag to apply errata 855873 during reset. This errata applies to all
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# revisions of the Cortex A53 CPU, but this firmware workaround only works
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# for revisions r0p3 and higher. Earlier revisions are taken care
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@ -84,10 +95,18 @@ ERRATA_A57_833471 ?=0
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$(eval $(call assert_boolean,ERRATA_A53_826319))
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$(eval $(call add_define,ERRATA_A53_826319))
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# Process ERRATA_A53_835769 flag
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$(eval $(call assert_boolean,ERRATA_A53_835769))
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$(eval $(call add_define,ERRATA_A53_835769))
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# Process ERRATA_A53_836870 flag
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$(eval $(call assert_boolean,ERRATA_A53_836870))
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$(eval $(call add_define,ERRATA_A53_836870))
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# Process ERRATA_A53_843419 flag
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$(eval $(call assert_boolean,ERRATA_A53_843419))
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$(eval $(call add_define,ERRATA_A53_843419))
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# Process ERRATA_A53_855873 flag
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$(eval $(call assert_boolean,ERRATA_A53_855873))
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$(eval $(call add_define,ERRATA_A53_855873))
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@ -123,3 +142,13 @@ $(eval $(call add_define,ERRATA_A57_829520))
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# Process ERRATA_A57_833471 flag
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$(eval $(call assert_boolean,ERRATA_A57_833471))
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$(eval $(call add_define,ERRATA_A57_833471))
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# Errata build flags
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ifneq (${ERRATA_A53_843419},0)
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LDFLAGS_aarch64 += --fix-cortex-a53-843419
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endif
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ifneq (${ERRATA_A53_835769},0)
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TF_CFLAGS_aarch64 += -mfix-cortex-a53-835769
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LDFLAGS_aarch64 += --fix-cortex-a53-835769
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endif
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@ -56,6 +56,8 @@ BL31_SOURCES += lib/cpus/aarch64/cortex_a53.S \
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endif
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# Enable workarounds for selected Cortex-A53 and A57 errata.
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ERRATA_A53_835769 := 1
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ERRATA_A53_843419 := 1
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ERRATA_A53_855873 := 1
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ERRATA_A57_806969 := 0
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ERRATA_A57_813419 := 1
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