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mem_protect: Add DRAM2 to the list of mem protected ranges

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On ARM platforms, the maximum size of the address space is limited
to 32-bits as defined in arm_def.h. In order to access DRAM2, which
is defined beyond the 32-bit address space, the maximum address space
is increased to 36-bits in AArch64. It is possible to increase the
virtual space for AArch32, but it is more difficult and not supported
for now.

NOTE - the actual maximum memory address space is platform dependent
and is checked at run-time by querying the PARange field in the
ID_AA64MMFR0_EL1 register.

Change-Id: I6cb05c78a63b1fed96db9a9773faca04a5b93d67
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
This commit is contained in:
Roberto Vargas 2017-08-08 11:27:20 +01:00
parent f145403c2a
commit b09ba056c4
5 changed files with 27 additions and 3 deletions
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15
include/plat/arm/common/arm_def.h
View File

@ -177,7 +177,12 @@
ARM_NS_DRAM1_SIZE, \
MT_MEMORY | MT_RW | MT_NS)
#define ARM_MAP_DRAM2 MAP_REGION_FLAT( \
ARM_DRAM2_BASE, \
ARM_DRAM2_SIZE, \
MT_MEMORY | MT_RW | MT_NS)
#ifdef SPD_tspd
#define ARM_MAP_TSP_SEC_MEM MAP_REGION_FLAT( \
TSP_SEC_MEM_BASE, \
TSP_SEC_MEM_SIZE, \
@ -224,8 +229,18 @@
* Required platform porting definitions common to all ARM standard platforms
*****************************************************************************/
/*
* We need to access DRAM2 from BL2 for PSCI_MEM_PROTECT for
* AArch64 builds
*/
#ifdef AARCH64
#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 36)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 36)
#else
#define PLAT_PHY_ADDR_SPACE_SIZE (1ull << 32)
#define PLAT_VIRT_ADDR_SPACE_SIZE (1ull << 32)
#endif
/*
* This macro defines the deepest retention state possible. A higher state

3
plat/arm/board/common/board_css_common.c
View File

@ -36,6 +36,9 @@ const mmap_region_t plat_arm_mmap[] = {
CSS_MAP_DEVICE,
SOC_CSS_MAP_DEVICE,
ARM_MAP_NS_DRAM1,
#ifdef AARCH64
ARM_MAP_DRAM2,
#endif
#ifdef SPD_tspd
ARM_MAP_TSP_SEC_MEM,
#endif

3
plat/arm/board/fvp/fvp_common.c
View File

@ -79,6 +79,9 @@ const mmap_region_t plat_arm_mmap[] = {
MAP_DEVICE0,
MAP_DEVICE1,
ARM_MAP_NS_DRAM1,
#ifdef AARCH64
ARM_MAP_DRAM2,
#endif
#ifdef SPD_tspd
ARM_MAP_TSP_SEC_MEM,
#endif

6
plat/arm/board/juno/include/platform_def.h
View File

@ -68,10 +68,10 @@
#ifdef IMAGE_BL2
#ifdef SPD_opteed
# define PLAT_ARM_MMAP_ENTRIES 10
# define PLAT_ARM_MMAP_ENTRIES 11
# define MAX_XLAT_TABLES 5
#else
# define PLAT_ARM_MMAP_ENTRIES 9
# define PLAT_ARM_MMAP_ENTRIES 10
# define MAX_XLAT_TABLES 4
#endif
#endif
@ -82,7 +82,7 @@
#endif
#ifdef IMAGE_BL31
# define PLAT_ARM_MMAP_ENTRIES 6
# define PLAT_ARM_MMAP_ENTRIES 7
# define MAX_XLAT_TABLES 3
#endif

3
plat/arm/common/arm_nor_psci_mem_protect.c
View File

@ -14,6 +14,9 @@
mem_region_t arm_ram_ranges[] = {
{ARM_NS_DRAM1_BASE, ARM_NS_DRAM1_SIZE},
#ifdef AARCH64
{ARM_DRAM2_BASE, ARM_DRAM2_SIZE},
#endif
};
/*******************************************************************************