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Invalidate dcache build option for bl2 entry at EL3
Some of the platform (ie. Agilex) make use of CCU IPs which will only be initialized during bl2_el3_early_platform_setup. Any operation to the cache beforehand will crash the platform. Hence, this will provide an option to skip the data cache invalidation upon bl2 entry at EL3 Signed-off-by: Hadi Asyrafi <muhammad.hadi.asyrafi.abdul.halim@intel.com> Change-Id: I2c924ed0589a72d0034714c31be8fe57237d1f06
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2
Makefile
2
Makefile
@ -689,6 +689,7 @@ $(eval $(call assert_boolean,USE_TBBR_DEFS))
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$(eval $(call assert_boolean,WARMBOOT_ENABLE_DCACHE_EARLY))
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$(eval $(call assert_boolean,BL2_AT_EL3))
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$(eval $(call assert_boolean,BL2_IN_XIP_MEM))
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$(eval $(call assert_boolean,BL2_INV_DCACHE))
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$(eval $(call assert_numeric,ARM_ARCH_MAJOR))
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$(eval $(call assert_numeric,ARM_ARCH_MINOR))
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@ -749,6 +750,7 @@ $(eval $(call add_define,USE_TBBR_DEFS))
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$(eval $(call add_define,WARMBOOT_ENABLE_DCACHE_EARLY))
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$(eval $(call add_define,BL2_AT_EL3))
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$(eval $(call add_define,BL2_IN_XIP_MEM))
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$(eval $(call add_define,BL2_INV_DCACHE))
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ifeq (${SANITIZE_UB},trap)
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$(eval $(call add_define,MONITOR_TRAPS))
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@ -287,6 +287,12 @@ Common build options
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enable this use-case. For now, this option is only supported when BL2_AT_EL3
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is set to '1'.
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- ``BL2_INV_DCACHE``: This is an optional build option which control dcache
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invalidation upon BL2 entry. Some platform cannot handle cache operations
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during entry as the coherency unit is not yet initialized. This may cause
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crashing. Leaving this option to '1' (default) will allow the operation.
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This option is only relevant when BL2_AT_EL3 is set to '1'.
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- ``BL31``: This is an optional build option which specifies the path to
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BL31 image for the ``fip`` target. In this case, the BL31 in TF-A will not
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be built.
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@ -333,7 +333,7 @@
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* ---------------------------------------------------------------------
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*/
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.if \_init_c_runtime
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#if defined(IMAGE_BL31) || (defined(IMAGE_BL2) && BL2_AT_EL3)
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#if defined(IMAGE_BL31) || (defined(IMAGE_BL2) && BL2_AT_EL3 && BL2_INV_DCACHE)
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/* -------------------------------------------------------------
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* Invalidate the RW memory used by the BL31 image. This
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* includes the data and NOBITS sections. This is done to
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@ -33,6 +33,9 @@ BL2_AT_EL3 := 0
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# when BL2_AT_EL3 is 1.
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BL2_IN_XIP_MEM := 0
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# Do dcache invalidate upon BL2 entry at EL3
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BL2_INV_DCACHE := 1
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# Select the branch protection features to use.
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BRANCH_PROTECTION := 0
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@ -70,5 +70,6 @@ BL31_SOURCES += \
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PROGRAMMABLE_RESET_ADDRESS := 0
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BL2_AT_EL3 := 1
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BL2_INV_DCACHE := 0
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MULTI_CONSOLE_API := 1
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USE_COHERENT_MEM := 1
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