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https://github.com/CTCaer/switch-l4t-atf.git
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Fix SPSR register size in gp_regs structure
SPSR is a 32-bit register and so its size should be reflected in the gp_regs structure. This patch fixes the type of gp_regs.spsr to use a 32-bit variable. It also makes the size of the other register fields more explicit. Change-Id: I27e0367df1a91cc501d5217c1b3856d4097c60ba
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@ -115,43 +115,43 @@
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#ifndef __ASSEMBLY__
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typedef struct {
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unsigned long x0;
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unsigned long x1;
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unsigned long x2;
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unsigned long x3;
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unsigned long x4;
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unsigned long x5;
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unsigned long x6;
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unsigned long x7;
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unsigned long x8;
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unsigned long x9;
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unsigned long x10;
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unsigned long x11;
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unsigned long x12;
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unsigned long x13;
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unsigned long x14;
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unsigned long x15;
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unsigned long x16;
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unsigned long x17;
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unsigned long x18;
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unsigned long x19;
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unsigned long x20;
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unsigned long x21;
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unsigned long x22;
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unsigned long x23;
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unsigned long x24;
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unsigned long x25;
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unsigned long x26;
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unsigned long x27;
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unsigned long x28;
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unsigned long sp_el0;
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unsigned long spsr;
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uint64_t x0;
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uint64_t x1;
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uint64_t x2;
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uint64_t x3;
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uint64_t x4;
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uint64_t x5;
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uint64_t x6;
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uint64_t x7;
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uint64_t x8;
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uint64_t x9;
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uint64_t x10;
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uint64_t x11;
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uint64_t x12;
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uint64_t x13;
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uint64_t x14;
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uint64_t x15;
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uint64_t x16;
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uint64_t x17;
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uint64_t x18;
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uint64_t x19;
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uint64_t x20;
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uint64_t x21;
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uint64_t x22;
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uint64_t x23;
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uint64_t x24;
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uint64_t x25;
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uint64_t x26;
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uint64_t x27;
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uint64_t x28;
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uint64_t sp_el0;
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uint32_t spsr;
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/*
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* Alignment constraint which allows save & restore of fp & lr on the
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* stack during exception handling
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*/
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unsigned long fp __attribute__((__aligned__(16)));
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unsigned long lr;
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uint64_t fp __attribute__((__aligned__(16)));
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uint64_t lr;
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} __attribute__((__aligned__(16))) gp_regs;
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/*******************************************************************************
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@ -103,12 +103,12 @@ save_regs:; .type save_regs, %function
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mrs x0, sp_el0
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stp x28, x0, [sp, #GPREGS_X28_OFF]
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mrs x0, spsr_el3
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str x0, [sp, #GPREGS_SPSR_OFF]
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str w0, [sp, #GPREGS_SPSR_OFF]
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ret
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restore_regs:; .type restore_regs, %function
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ldr x9, [sp, #GPREGS_SPSR_OFF]
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ldr w9, [sp, #GPREGS_SPSR_OFF]
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msr spsr_el3, x9
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ldp x28, x9, [sp, #GPREGS_X28_OFF]
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msr sp_el0, x9
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