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Fix BL31 crash reporting on AArch64 only machines
The AArch32 system registers are not listed if the platform supports AArch64 only. Change-Id: I087a10ae6e7cad1bb52775a344635dbac1f12679 Signed-off-by: Imre Kis <imre.kis@arm.com>
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@ -1,5 +1,5 @@
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/*
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* Copyright (c) 2014-2017, ARM Limited and Contributors. All rights reserved.
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* Copyright (c) 2014-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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@ -45,10 +45,14 @@ non_el3_sys_regs:
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"spsr_irq", "spsr_fiq", "sctlr_el1", "actlr_el1", "cpacr_el1",\
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"csselr_el1", "sp_el1", "esr_el1", "ttbr0_el1", "ttbr1_el1",\
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"mair_el1", "amair_el1", "tcr_el1", "tpidr_el1", "tpidr_el0",\
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"tpidrro_el0", "dacr32_el2", "ifsr32_el2", "par_el1",\
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"mpidr_el1", "afsr0_el1", "afsr1_el1", "contextidr_el1",\
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"vbar_el1", "cntp_ctl_el0", "cntp_cval_el0", "cntv_ctl_el0",\
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"cntv_cval_el0", "cntkctl_el1", "sp_el0", "isr_el1", ""
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"tpidrro_el0", "par_el1", "mpidr_el1", "afsr0_el1", "afsr1_el1",\
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"contextidr_el1", "vbar_el1", "cntp_ctl_el0", "cntp_cval_el0",\
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"cntv_ctl_el0", "cntv_cval_el0", "cntkctl_el1", "sp_el0", "isr_el1", ""
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#if CTX_INCLUDE_AARCH32_REGS
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aarch32_regs:
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.asciz "dacr32_el2", "ifsr32_el2", ""
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#endif /* CTX_INCLUDE_AARCH32_REGS */
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panic_msg:
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.asciz "PANIC in EL3 at x30 = 0x"
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@ -299,25 +303,31 @@ func do_crash_reporting
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mrs x9, tpidr_el1
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mrs x10, tpidr_el0
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mrs x11, tpidrro_el0
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mrs x12, dacr32_el2
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mrs x13, ifsr32_el2
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mrs x14, par_el1
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mrs x15, mpidr_el1
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mrs x12, par_el1
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mrs x13, mpidr_el1
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mrs x14, afsr0_el1
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mrs x15, afsr1_el1
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bl str_in_crash_buf_print
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mrs x8, afsr0_el1
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mrs x9, afsr1_el1
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mrs x10, contextidr_el1
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mrs x11, vbar_el1
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mrs x12, cntp_ctl_el0
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mrs x13, cntp_cval_el0
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mrs x14, cntv_ctl_el0
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mrs x15, cntv_cval_el0
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mrs x8, contextidr_el1
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mrs x9, vbar_el1
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mrs x10, cntp_ctl_el0
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mrs x11, cntp_cval_el0
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mrs x12, cntv_ctl_el0
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mrs x13, cntv_cval_el0
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mrs x14, cntkctl_el1
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mrs x15, sp_el0
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bl str_in_crash_buf_print
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mrs x8, cntkctl_el1
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mrs x9, sp_el0
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mrs x10, isr_el1
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mrs x8, isr_el1
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bl str_in_crash_buf_print
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#if CTX_INCLUDE_AARCH32_REGS
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/* Print the AArch32 registers */
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adr x6, aarch32_regs
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mrs x8, dacr32_el2
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mrs x9, ifsr32_el2
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bl str_in_crash_buf_print
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#endif /* CTX_INCLUDE_AARCH32_REGS */
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/* Get the cpu specific registers to report */
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bl do_cpu_reg_dump
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bl str_in_crash_buf_print
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