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fdt/wrappers: Replace fdtw_read_cells() implementation
Our fdtw_read_cells() implementation goes to great lengths to sanity-check every parameter and result, but leaves a big hole open: The size of the storage the value pointer points at needs to match the number of cells given. This can't be easily checked at compile time, since we lose the size information by using a void pointer. Regardless the current usage of this function is somewhat wrong anyways, since we use it on single-element, fixed-length properties only, for which the DT binding specifies the size. Typically we use those functions dealing with a number of cells in DT context to deal with *dynamically* sized properties, which depend on other properties (#size-cells, #clock-cells, ...), to specify the number of cells needed. Another problem with the current implementation is the use of ambiguously sized types (uintptr_t, size_t) together with a certain expectation about their size. In general there is no relation between the length of a DT property and the bitness of the code that parses the DTB: AArch64 code could encounter 32-bit addresses (where the physical address space is limited to 4GB [1]), while AArch32 code could read 64-bit sized properties (/memory nodes on LPAE systems, [2]). To make this more clear, fix the potential issues and also align more with other DT users (Linux and U-Boot), introduce functions to explicitly read uint32 and uint64 properties. As the other DT consumers, we do this based on the generic "read array" function. Convert all users to use either of those two new functions, and make sure we never use a pointer to anything other than uint32_t or uint64_t variables directly. This reveals (and fixes) a bug in plat_spmd_manifest.c, where we write 4 bytes into a uint16_t variable (passed via a void pointer). Also we change the implementation of the function to better align with other libfdt users, by using the right types (fdt32_t) and common variable names (*prop, prop_names). [1] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi#n874 [2] https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm/boot/dts/ecx-2000.dts Change-Id: I718de960515117ac7a3331a1b177d2ec224a3890 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
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@ -14,55 +14,6 @@
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#include <common/debug.h>
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#include <common/fdt_wrappers.h>
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/*
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* Read cells from a given property of the given node. At most 2 cells of the
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* property are read, and pointer is updated. Returns 0 on success, and -1 upon
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* error
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*/
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int fdtw_read_cells(const void *dtb, int node, const char *prop,
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unsigned int cells, void *value)
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{
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const uint32_t *value_ptr;
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uint32_t hi = 0, lo;
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int value_len;
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assert(dtb != NULL);
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assert(prop != NULL);
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assert(value != NULL);
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assert(node >= 0);
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/* We expect either 1 or 2 cell property */
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assert(cells <= 2U);
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/* Access property and obtain its length (in bytes) */
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value_ptr = fdt_getprop_namelen(dtb, node, prop, (int)strlen(prop),
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&value_len);
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if (value_ptr == NULL) {
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WARN("Couldn't find property %s in dtb\n", prop);
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return -1;
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}
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/* Verify that property length accords with cell length */
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if (NCELLS((unsigned int)value_len) != cells) {
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WARN("Property length mismatch\n");
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return -1;
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}
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if (cells == 2U) {
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hi = fdt32_to_cpu(*value_ptr);
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value_ptr++;
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}
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lo = fdt32_to_cpu(*value_ptr);
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if (cells == 2U)
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*((uint64_t *) value) = ((uint64_t) hi << 32) | lo;
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else
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*((uint32_t *) value) = lo;
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return 0;
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}
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/*
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* Read cells from a given property of the given node. Any number of 32-bit
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* cells of the property can be read. Returns 0 on success, or a negative
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@ -99,6 +50,27 @@ int fdt_read_uint32_array(const void *dtb, int node, const char *prop_name,
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return 0;
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}
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int fdt_read_uint32(const void *dtb, int node, const char *prop_name,
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uint32_t *value)
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{
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return fdt_read_uint32_array(dtb, node, prop_name, 1, value);
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}
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int fdt_read_uint64(const void *dtb, int node, const char *prop_name,
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uint64_t *value)
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{
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uint32_t array[2] = {0, 0};
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int ret;
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ret = fdt_read_uint32_array(dtb, node, prop_name, 2, array);
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if (ret < 0) {
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return ret;
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}
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*value = ((uint64_t)array[0] << 32) | array[1];
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return 0;
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}
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/*
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* Read bytes from a given property of the given node. Any number of
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* bytes of the property can be read. The fdt pointer is updated.
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@ -12,8 +12,10 @@
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/* Number of cells, given total length in bytes. Each cell is 4 bytes long */
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#define NCELLS(len) ((len) / 4U)
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int fdtw_read_cells(const void *dtb, int node, const char *prop,
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unsigned int cells, void *value);
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int fdt_read_uint32(const void *dtb, int node, const char *prop_name,
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uint32_t *value);
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int fdt_read_uint64(const void *dtb, int node, const char *prop_name,
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uint64_t *value);
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int fdt_read_uint32_array(const void *dtb, int node, const char *prop_name,
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unsigned int cells, uint32_t *value);
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int fdtw_read_string(const void *dtb, int node, const char *prop,
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@ -57,26 +57,32 @@ int fconf_populate_dtb_registry(uintptr_t config)
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}
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fdt_for_each_subnode(child, dtb, node) {
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uint32_t val32;
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uint64_t val64;
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dtb_info = pool_alloc(&dtb_info_pool);
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/* Read configuration dtb information */
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rc = fdtw_read_cells(dtb, child, "load-address", 2, &dtb_info->config_addr);
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rc = fdt_read_uint64(dtb, child, "load-address", &val64);
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if (rc < 0) {
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ERROR("FCONF: Incomplete configuration property in dtb-registry.\n");
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return rc;
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}
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dtb_info->config_addr = (uintptr_t)val64;
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rc = fdtw_read_cells(dtb, child, "max-size", 1, &dtb_info->config_max_size);
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rc = fdt_read_uint32(dtb, child, "max-size", &val32);
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if (rc < 0) {
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ERROR("FCONF: Incomplete configuration property in dtb-registry.\n");
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return rc;
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}
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dtb_info->config_max_size = val32;
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rc = fdtw_read_cells(dtb, child, "id", 1, &dtb_info->config_id);
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rc = fdt_read_uint32(dtb, child, "id", &val32);
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if (rc < 0) {
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ERROR("FCONF: Incomplete configuration property in dtb-registry.\n");
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return rc;
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}
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dtb_info->config_id = val32;
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VERBOSE("FCONF: dyn_cfg.dtb_registry cell found with:\n");
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VERBOSE("\tload-address = %lx\n", dtb_info->config_addr);
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@ -17,6 +17,8 @@ int fconf_populate_tbbr_dyn_config(uintptr_t config)
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{
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int err;
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int node;
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uint64_t val64;
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uint32_t val32;
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/* As libfdt use void *, we can't avoid this cast */
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const void *dtb = (void *)config;
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@ -30,7 +32,7 @@ int fconf_populate_tbbr_dyn_config(uintptr_t config)
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}
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/* Locate the disable_auth cell and read the value */
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err = fdtw_read_cells(dtb, node, "disable_auth", 1, &tbbr_dyn_config.disable_auth);
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err = fdt_read_uint32(dtb, node, "disable_auth", &tbbr_dyn_config.disable_auth);
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if (err < 0) {
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WARN("FCONF: Read cell failed for `disable_auth`\n");
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return err;
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@ -48,19 +50,19 @@ int fconf_populate_tbbr_dyn_config(uintptr_t config)
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#endif
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/* Retrieve the Mbed TLS heap details from the DTB */
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err = fdtw_read_cells(dtb, node,
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"mbedtls_heap_addr", 2, &tbbr_dyn_config.mbedtls_heap_addr);
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err = fdt_read_uint64(dtb, node, "mbedtls_heap_addr", &val64);
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if (err < 0) {
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ERROR("FCONF: Read cell failed for mbedtls_heap\n");
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return err;
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}
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tbbr_dyn_config.mbedtls_heap_addr = (void *)(uintptr_t)val64;
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err = fdtw_read_cells(dtb, node,
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"mbedtls_heap_size", 1, &tbbr_dyn_config.mbedtls_heap_size);
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err = fdt_read_uint32(dtb, node, "mbedtls_heap_size", &val32);
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if (err < 0) {
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ERROR("FCONF: Read cell failed for mbedtls_heap\n");
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return err;
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}
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tbbr_dyn_config.mbedtls_heap_size = val32;
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VERBOSE("FCONF:tbbr.disable_auth cell found with value = %d\n",
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tbbr_dyn_config.disable_auth);
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@ -51,8 +51,9 @@ int fconf_populate_gicv3_config(uintptr_t config)
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int fconf_populate_topology(uintptr_t config)
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{
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int err, node, cluster_node, core_node, thread_node, max_pwr_lvl = 0;
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int err, node, cluster_node, core_node, thread_node;
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uint32_t cluster_count = 0, max_cpu_per_cluster = 0, total_cpu_count = 0;
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uint32_t max_pwr_lvl = 0;
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/* Necessary to work with libfdt APIs */
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const void *hw_config_dtb = (const void *)config;
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@ -64,7 +65,7 @@ int fconf_populate_topology(uintptr_t config)
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return node;
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}
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err = fdtw_read_cells(hw_config_dtb, node, "max-pwr-lvl", 1, &max_pwr_lvl);
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err = fdt_read_uint32(hw_config_dtb, node, "max-pwr-lvl", &max_pwr_lvl);
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if (err < 0) {
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/*
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* Some legacy FVP dts may not have this property. Assign the default
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@ -74,7 +75,7 @@ int fconf_populate_topology(uintptr_t config)
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max_pwr_lvl = 2;
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}
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assert((uint32_t)max_pwr_lvl <= MPIDR_AFFLVL2);
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assert(max_pwr_lvl <= MPIDR_AFFLVL2);
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/* Find the offset of the "cpus" node */
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node = fdt_path_offset(hw_config_dtb, "/cpus");
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@ -156,7 +157,7 @@ int fconf_populate_topology(uintptr_t config)
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return -1;
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}
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soc_topology.plat_max_pwr_level = (uint32_t)max_pwr_lvl;
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soc_topology.plat_max_pwr_level = max_pwr_lvl;
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soc_topology.plat_cluster_count = cluster_count;
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soc_topology.cluster_cpu_count = max_cpu_per_cluster;
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soc_topology.plat_cpu_count = total_cpu_count;
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@ -29,6 +29,7 @@ int fconf_populate_arm_sp(uintptr_t config)
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int sp_node, node, err;
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union uuid_helper_t uuid_helper;
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unsigned int index = 0;
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uint32_t val32;
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const unsigned int sp_start_index = MAX_NUMBER_IDS - MAX_SP_IDS;
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/* As libfdt use void *, we can't avoid this cast */
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@ -53,12 +54,12 @@ int fconf_populate_arm_sp(uintptr_t config)
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arm_sp.uuids[index] = uuid_helper;
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err = fdtw_read_cells(dtb, sp_node, "load-address", 1,
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&arm_sp.load_addr[index]);
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err = fdt_read_uint32(dtb, sp_node, "load-address", &val32);
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if (err < 0) {
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ERROR("FCONF: cannot read SP load address\n");
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return -1;
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}
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arm_sp.load_addr[index] = val32;
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VERBOSE("FCONF: %s UUID %x-%x-%x-%x load_addr=%lx\n",
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__func__,
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@ -21,41 +21,43 @@ static int manifest_parse_attribute(spmc_manifest_sect_attribute_t *attr,
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const void *fdt,
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int node)
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{
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uint32_t val32;
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int rc = 0;
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assert(attr && fdt);
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rc = fdtw_read_cells(fdt, node, "maj_ver", 1, &attr->major_version);
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rc = fdt_read_uint32(fdt, node, "maj_ver", &attr->major_version);
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if (rc) {
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ERROR("Missing SPCI major version in SPM core manifest.\n");
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return -ENOENT;
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}
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rc = fdtw_read_cells(fdt, node, "min_ver", 1, &attr->minor_version);
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rc = fdt_read_uint32(fdt, node, "min_ver", &attr->minor_version);
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if (rc) {
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ERROR("Missing SPCI minor version in SPM core manifest.\n");
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return -ENOENT;
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}
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rc = fdtw_read_cells(fdt, node, "spmc_id", 1, &attr->spmc_id);
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rc = fdt_read_uint32(fdt, node, "spmc_id", &val32);
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if (rc) {
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ERROR("Missing SPMC ID in manifest.\n");
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return -ENOENT;
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}
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attr->spmc_id = val32;
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rc = fdtw_read_cells(fdt, node, "exec_state", 1, &attr->exec_state);
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rc = fdt_read_uint32(fdt, node, "exec_state", &attr->exec_state);
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if (rc)
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NOTICE("Execution state not specified in SPM core manifest.\n");
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rc = fdtw_read_cells(fdt, node, "binary_size", 1, &attr->binary_size);
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rc = fdt_read_uint32(fdt, node, "binary_size", &attr->binary_size);
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if (rc)
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NOTICE("Binary size not specified in SPM core manifest.\n");
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rc = fdtw_read_cells(fdt, node, "load_address", 2, &attr->load_address);
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rc = fdt_read_uint64(fdt, node, "load_address", &attr->load_address);
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if (rc)
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NOTICE("Load address not specified in SPM core manifest.\n");
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rc = fdtw_read_cells(fdt, node, "entrypoint", 2, &attr->entrypoint);
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rc = fdt_read_uint64(fdt, node, "entrypoint", &attr->entrypoint);
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if (rc)
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NOTICE("Entrypoint not specified in SPM core manifest.\n");
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