Commit Graph

14 Commits

Author SHA1 Message Date
Harry Liebel
375ae68e8d Increase default amount of RAM for Base FVPs in FDTs
- Large RAM-disks may have trouble starting with 2GB of memory.
- Increase from 2GB to 4GB in FDT.

Change-Id: I12c1b8e5db41114b88c69c48621cb21247a6a6a7
2013-11-27 15:31:06 +00:00
Sandrine Bailleux
942f405357 fvp: Remove call to bl2_get_ns_mem_layout() function
On FVP platforms, for now it is assumed that the normal-world
bootloader is already sitting in its final memory location.
Therefore, BL2 doesn't need to load it and so it doesn't need
to know the extents of the non-trusted DRAM.

Change-Id: I33177ab43ca242edc8958f2fa8d994e7cf3e0843
2013-11-27 15:31:06 +00:00
Sandrine Bailleux
295538bc37 AArch64: Remove EL-agnostic TLB helper functions
Also, don't invalidate the TLBs in disable_mmu() function, it's better
to do it in enable_mmu() function just before actually enabling the
MMU.

Change-Id: Ib32d6660019b0b2c17254156aad4be67ab4970e1
2013-11-27 15:31:06 +00:00
Sandrine Bailleux
3738274dc1 Unmask SError and Debug exceptions.
Any asynchronous exception caused by the firmware should be handled
in the firmware itself.  For this reason, unmask SError exceptions
(and Debug ones as well) on all boot paths.  Also route external
abort and SError interrupts to EL3, otherwise they will target EL1.

Change-Id: I9c191d2d0dcfef85f265641c8460dfbb4d112092
2013-11-27 15:31:06 +00:00
Sandrine Bailleux
204aa03da7 fvp: Remove unnecessary initializers
Global and static variables are expected to be initialised to zero
by default.  This is specified by the C99 standard. This patch
removes some unnecessary initialisations of such variables.

It fixes a compilation warning at the same time:
  plat/fvp/bl31_plat_setup.c:82:3: warning: missing braces around
  initializer [-Wmissing-braces]
     section("tzfw_coherent_mem"))) = {0};
     ^
  plat/fvp/bl31_plat_setup.c:82:3: warning: (near initialization for
  ‘ns_entry_info[0]’) [-Wmissing-braces]

Note that GCC should not have emitted this warning message in the
first place.  The C Standard permits braces to be elided around
subaggregate initializers.  See this GCC bug report:
http://gcc.gnu.org/bugzilla/show_bug.cgi?id=53119

Change-Id: I13cb0c344feb9803bca8819f976377741fa6bc35
2013-11-27 15:31:06 +00:00
Sandrine Bailleux
27866d8428 Fix inlining of GIC helper functions
Change-Id: I27aad560a5da21c0439f3ccc9dc07b026e7c6022
2013-11-27 15:31:06 +00:00
Sandrine Bailleux
c10bd2ce69 Move generic architectural setup out of blx_plat_arch_setup().
blx_plat_arch_setup() should only perform platform-specific
architectural setup, e.g. enabling the MMU.  This patch moves
generic architectural setup code out of blx_plat_arch_setup().

Change-Id: I4ccf56b8c4a2fa84909817779a2d97a14aaafab6
2013-11-27 15:31:06 +00:00
James Morrissey
ba3155bb0e Fix documentation issues in v0.2 release
Change-Id: I4e2a9daa97e3be3d2f53894f2ec7947ba6bb3a16
2013-11-14 17:48:52 +00:00
Harry Liebel
cff4e296be Add Foundation FVP documentation
Change-Id: I5e47ba96e128d3a793517441f5a6c9f2ccbdfc66
2013-11-14 17:48:52 +00:00
Harry Liebel
3498859bd4 Add GICv3 ITS to FDTs
- The interrupt addresses need to be updated to work.

Change-Id: Icdd00177095ae9e4eb7b13718762f92e29b1465c
2013-11-14 17:48:52 +00:00
Harry Liebel
30affd563a Do not enable CCI on Foundation FVP
- The Foundation FVP only has one cluster and does not have
  CCI.

Change-Id: If91e81ff72c52e448150089c4cfea3e4d6ae1232
2013-11-14 17:48:52 +00:00
Harry Liebel
43ef4f1ee7 FDTs for v5.2 Foundation model
- The Foundation FVP is a cut down version of the Base FVP and as
  such lacks some components.
- Three FDTs are provided.
  fvp-foundation-gicv2legacy-psci:
    Use this when setting the Foundation FVP to use GICv2. In this
    mode the GIC is located at the VE location, as described in the
    VE platform memory map.
  fvp-foundation-gicv3-psci :
    Use this when setting the Foundation FVP to use GICv3. In this
    mode the GIC is located at the Base location, as described in the
    Base platform memory map.
  fvp-foundation-gicv2-psci :
    Use this when setting the Foundation FVP to use GICv3, but Linux
    is expected to use GICv2 emulation mode. In this mode the GIC is
    located at the Base location, but the GICv3 is used in GICv2
    emulation mode.

Change-Id: I9d69bcef35c64cc8f16550efe077f578e55aaae5
2013-11-14 17:48:52 +00:00
Harry Liebel
068b950f63 Writing to the FVP LED register should be a 32bit access.
- Writing to this register with a 64bit access can cause a
  Systen Error Exception on some models.

Change-Id: Ibcf5bdf7ab55707db61c16298f25caff50e1ff7e
2013-11-14 17:48:52 +00:00
Achin Gupta
4f6ad66ae9 ARMv8 Trusted Firmware release v0.2 2013-10-25 09:37:16 +01:00