switch-l4t-atf/lib/cpus/aarch32
Dimitris Papastamos e086570815 aarch32: Implement static workaround for CVE-2018-3639
Implement static mitigation for CVE-2018-3639 on
Cortex A57 and A72.

Change-Id: I83409a16238729b84142b19e258c23737cc1ddc3
Signed-off-by: Dimitris Papastamos <dimitris.papastamos@arm.com>
2018-05-23 12:45:48 +01:00
..
aem_generic.S Use SPDX license identifiers 2017-05-03 09:39:28 +01:00
cortex_a5.S ARMv7: introduce Cortex-A5 2017-11-08 13:49:45 +01:00
cortex_a7.S ARMv7: introduce Cortex-A7 2017-11-08 13:49:49 +01:00
cortex_a9.S Workaround for CVE-2017-5715 for Cortex A9, A15 and A17 2018-01-18 10:36:25 +00:00
cortex_a12.S ARMv7: introduce Cortex-A12 2017-11-08 13:49:55 +01:00
cortex_a15.S Workaround for CVE-2017-5715 for Cortex A9, A15 and A17 2018-01-18 10:36:25 +00:00
cortex_a17.S Workaround for CVE-2017-5715 for Cortex A9, A15 and A17 2018-01-18 10:36:25 +00:00
cortex_a32.S Use SPDX license identifiers 2017-05-03 09:39:28 +01:00
cortex_a53.S Replace macro ASM_ASSERTION with macro ENABLE_ASSERTIONS 2017-11-23 09:44:07 +08:00
cortex_a57.S aarch32: Implement static workaround for CVE-2018-3639 2018-05-23 12:45:48 +01:00
cortex_a72.S aarch32: Implement static workaround for CVE-2018-3639 2018-05-23 12:45:48 +01:00
cpu_helpers.S Fixup AArch32 errata printing framework 2018-02-22 15:19:52 +00:00