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12f6c06497
This patch adds setting MDCR_EL3.MCCD in 'el3_arch_init_common' macro to disable cycle counting by PMCCNTR_EL0 in EL3 when FEAT_PMUv3p7 is implemented. This fixes failing test 'Leak PMU CYCLE counter values from EL3 on PSCI suspend SMC' on FVP models with 'has_v8_7_pmu_extension' parameter set to 1 or 2. Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Change-Id: I2ad3ef501b31ee11306f76cb5a61032ecfd0fbda |
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arch | ||
bl1 | ||
bl2 | ||
bl2u | ||
bl31 | ||
bl32 | ||
common | ||
drivers | ||
dt-bindings | ||
export | ||
lib | ||
plat | ||
services | ||
tools_share |