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https://github.com/CTCaer/switch-l4t-atf.git
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167a935733
Consolidate all BL3-1 CPU context initialization for cold boot, PSCI and SPDs into two functions: * The first uses entry_point_info to initialize the relevant cpu_context for first entry into a lower exception level on a CPU * The second populates the EL1 and EL2 system registers as needed from the cpu_context to ensure correct entry into the lower EL This patch alters the way that BL3-1 determines which exception level is used when first entering EL1 or EL2 during cold boot - this is now fully determined by the SPSR value in the entry_point_info for BL3-3, as set up by the platform code in BL2 (or otherwise provided to BL3-1). In the situation that EL1 (or svc mode) is selected for a processor that supports EL2, the context management code will now configure all essential EL2 register state to ensure correct execution of EL1. This allows the platform code to run non-secure EL1 payloads directly without requiring a small EL2 stub or OS loader. Change-Id: If9fbb2417e82d2226e47568203d5a369f39d3b0f
165 lines
6.5 KiB
C
165 lines
6.5 KiB
C
/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <arch_helpers.h>
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#include <assert.h>
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#include <bl_common.h>
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#include <bl31.h>
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#include <context_mgmt.h>
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#include <platform.h>
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#include <runtime_svc.h>
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#include <stdio.h>
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#include <string.h>
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/*******************************************************************************
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* This function pointer is used to initialise the BL32 image. It's initialized
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* by SPD calling bl31_register_bl32_init after setting up all things necessary
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* for SP execution. In cases where both SPD and SP are absent, or when SPD
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* finds it impossible to execute SP, this pointer is left as NULL
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******************************************************************************/
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static int32_t (*bl32_init)(void);
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/*******************************************************************************
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* Variable to indicate whether next image to execute after BL31 is BL33
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* (non-secure & default) or BL32 (secure).
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******************************************************************************/
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static uint32_t next_image_type;
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/*******************************************************************************
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* Simple function to initialise all BL31 helper libraries.
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******************************************************************************/
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void bl31_lib_init()
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{
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cm_init();
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}
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/*******************************************************************************
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* BL31 is responsible for setting up the runtime services for the primary cpu
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* before passing control to the bootloader or an Operating System. This
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* function calls runtime_svc_init() which initializes all registered runtime
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* services. The run time services would setup enough context for the core to
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* swtich to the next exception level. When this function returns, the core will
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* switch to the programmed exception level via. an ERET.
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******************************************************************************/
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void bl31_main(void)
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{
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/* Perform remaining generic architectural setup from EL3 */
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bl31_arch_setup();
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/* Perform platform setup in BL1 */
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bl31_platform_setup();
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printf("BL31 %s\n\r", build_message);
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/* Initialise helper libraries */
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bl31_lib_init();
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/* Initialize the runtime services e.g. psci */
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runtime_svc_init();
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/* Clean caches before re-entering normal world */
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dcsw_op_all(DCCSW);
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/* By default run the non-secure BL3-3 image next */
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next_image_type = NON_SECURE;
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/*
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* All the cold boot actions on the primary cpu are done. We now need to
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* decide which is the next image (BL32 or BL33) and how to execute it.
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* If the SPD runtime service is present, it would want to pass control
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* to BL32 first in S-EL1. In that case, SPD would have registered a
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* function to intialize bl32 where it takes responsibility of entering
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* S-EL1 and returning control back to bl31_main. Once this is done we
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* can prepare entry into BL33 as normal.
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*/
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/*
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* If SPD had registerd an init hook, invoke it.
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*/
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if (bl32_init)
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(*bl32_init)();
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/*
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* We are ready to enter the next EL. Prepare entry into the image
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* corresponding to the desired security state after the next ERET.
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*/
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bl31_prepare_next_image_entry();
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}
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/*******************************************************************************
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* Accessor functions to help runtime services decide which image should be
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* executed after BL31. This is BL33 or the non-secure bootloader image by
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* default but the Secure payload dispatcher could override this by requesting
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* an entry into BL32 (Secure payload) first. If it does so then it should use
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* the same API to program an entry into BL33 once BL32 initialisation is
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* complete.
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******************************************************************************/
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void bl31_set_next_image_type(uint32_t security_state)
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{
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assert(security_state == NON_SECURE || security_state == SECURE);
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next_image_type = security_state;
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}
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uint32_t bl31_get_next_image_type(void)
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{
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return next_image_type;
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}
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/*******************************************************************************
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* This function programs EL3 registers and performs other setup to enable entry
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* into the next image after BL31 at the next ERET.
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******************************************************************************/
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void bl31_prepare_next_image_entry()
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{
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entry_point_info_t *next_image_info;
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uint32_t image_type;
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/* Determine which image to execute next */
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image_type = bl31_get_next_image_type();
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/* Program EL3 registers to enable entry into the next EL */
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next_image_info = bl31_plat_get_next_image_ep_info(image_type);
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assert(next_image_info);
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assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr));
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cm_init_context(read_mpidr_el1(), next_image_info);
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cm_prepare_el3_exit(image_type);
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}
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/*******************************************************************************
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* This function initializes the pointer to BL32 init function. This is expected
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* to be called by the SPD after it finishes all its initialization
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******************************************************************************/
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void bl31_register_bl32_init(int32_t (*func)(void))
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{
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bl32_init = func;
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}
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