switch-l4t-atf/lib
David Cunado 1a853370ff Enable SVE for Non-secure world
This patch adds a new build option, ENABLE_SVE_FOR_NS, which when set
to one EL3 will check to see if the Scalable Vector Extension (SVE) is
implemented when entering and exiting the Non-secure world.

If SVE is implemented, EL3 will do the following:

- Entry to Non-secure world: SIMD, FP and SVE functionality is enabled.

- Exit from Non-secure world: SIMD, FP and SVE functionality is
  disabled. As SIMD and FP registers are part of the SVE Z-registers
  then any use of SIMD / FP functionality would corrupt the SVE
  registers.

The build option default is 1. The SVE functionality is only supported
on AArch64 and so the build option is set to zero when the target
archiecture is AArch32.

This build option is not compatible with the CTX_INCLUDE_FPREGS - an
assert will be raised on platforms where SVE is implemented and both
ENABLE_SVE_FOR_NS and CTX_INCLUDE_FPREGS are set to 1.

Also note this change prevents secure world use of FP&SIMD registers on
SVE-enabled platforms. Existing Secure-EL1 Payloads will not work on
such platforms unless ENABLE_SVE_FOR_NS is set to 0.

Additionally, on the first entry into the Non-secure world the SVE
functionality is enabled and the SVE Z-register length is set to the
maximum size allowed by the architecture. This includes the use case
where EL2 is implemented but not used.

Change-Id: Ie2d733ddaba0b9bef1d7c9765503155188fe7dae
Signed-off-by: David Cunado <david.cunado@arm.com>
2017-11-30 17:45:09 +00:00
..
aarch32 ARMv7: division support for missing __aeabi_*divmod 2017-11-08 14:42:07 +01:00
aarch64 Introduce functions to disable the MMU in EL1 2017-10-17 12:02:37 +01:00
compiler-rt Import ctzdi2.c from LLVM compiler-rt 2017-07-26 09:28:23 +01:00
cpus Implement support for the Activity Monitor Unit on Cortex A75 2017-11-29 09:36:05 +00:00
el3_runtime Enable SVE for Non-secure world 2017-11-30 17:45:09 +00:00
extensions Enable SVE for Non-secure world 2017-11-30 17:45:09 +00:00
libfdt Use SPDX license identifiers 2017-05-03 09:39:28 +01:00
locks ARMv7 does not support STL instruction 2017-11-08 13:49:29 +01:00
optee Add Trusted OS extra image parsing support for ARM standard platforms 2017-08-09 18:06:05 +08:00
pmf Use SPDX license identifiers 2017-05-03 09:39:28 +01:00
psci Merge pull request #1145 from etienne-lms/rfc-armv7-2 2017-11-23 23:41:24 +00:00
semihosting Use SPDX license identifiers 2017-05-03 09:39:28 +01:00
stack_protector Use SPDX license identifiers 2017-05-03 09:39:28 +01:00
stdlib Use standard UNIX file:line format in assert 2017-07-19 05:57:40 +01:00
utils Add mem_region utility functions 2017-09-25 13:32:20 +01:00
xlat_tables Merge pull request #1145 from etienne-lms/rfc-armv7-2 2017-11-23 23:41:24 +00:00
xlat_tables_v2 Merge pull request #1145 from etienne-lms/rfc-armv7-2 2017-11-23 23:41:24 +00:00