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https://github.com/CTCaer/switch-l4t-atf.git
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a759d34519
The code managing the console is the same for all the platforms currently supported. Since it is unlikely to change in the future move the code to an external file in the common directory. Signed-off-by: Carlo Caione <ccaione@baylibre.com> Change-Id: I6df555ea82d483b4f08a4a1e2cb0a7488fbaa015
118 lines
3.2 KiB
C
118 lines
3.2 KiB
C
/*
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* Copyright (c) 2018-2019, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <bl31/interrupt_mgmt.h>
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#include <common/bl_common.h>
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#include <common/ep_info.h>
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#include <lib/mmio.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <platform_def.h>
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#include <stdint.h>
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/*******************************************************************************
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* Platform memory map regions
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******************************************************************************/
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#define MAP_NSDRAM0 MAP_REGION_FLAT(AML_NSDRAM0_BASE, \
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AML_NSDRAM0_SIZE, \
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MT_MEMORY | MT_RW | MT_NS)
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#define MAP_NSDRAM1 MAP_REGION_FLAT(AML_NSDRAM1_BASE, \
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AML_NSDRAM1_SIZE, \
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MT_MEMORY | MT_RW | MT_NS)
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#define MAP_SEC_DEVICE0 MAP_REGION_FLAT(AML_SEC_DEVICE0_BASE, \
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AML_SEC_DEVICE0_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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#define MAP_SEC_DEVICE1 MAP_REGION_FLAT(AML_SEC_DEVICE1_BASE, \
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AML_SEC_DEVICE1_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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#define MAP_TZRAM MAP_REGION_FLAT(AML_TZRAM_BASE, \
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AML_TZRAM_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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#define MAP_SEC_DEVICE2 MAP_REGION_FLAT(AML_SEC_DEVICE2_BASE, \
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AML_SEC_DEVICE2_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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#define MAP_SEC_DEVICE3 MAP_REGION_FLAT(AML_SEC_DEVICE3_BASE, \
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AML_SEC_DEVICE3_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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static const mmap_region_t gxl_mmap[] = {
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MAP_NSDRAM0,
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MAP_NSDRAM1,
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MAP_SEC_DEVICE0,
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MAP_SEC_DEVICE1,
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MAP_TZRAM,
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MAP_SEC_DEVICE2,
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MAP_SEC_DEVICE3,
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{0}
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};
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/*******************************************************************************
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* Per-image regions
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******************************************************************************/
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#define MAP_BL31 MAP_REGION_FLAT(BL31_BASE, \
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BL31_END - BL31_BASE, \
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MT_MEMORY | MT_RW | MT_SECURE)
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#define MAP_BL_CODE MAP_REGION_FLAT(BL_CODE_BASE, \
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BL_CODE_END - BL_CODE_BASE, \
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MT_CODE | MT_SECURE)
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#define MAP_BL_RO_DATA MAP_REGION_FLAT(BL_RO_DATA_BASE, \
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BL_RO_DATA_END - BL_RO_DATA_BASE, \
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MT_RO_DATA | MT_SECURE)
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#define MAP_BL_COHERENT MAP_REGION_FLAT(BL_COHERENT_RAM_BASE, \
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BL_COHERENT_RAM_END - BL_COHERENT_RAM_BASE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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/*******************************************************************************
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* Function that sets up the translation tables.
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******************************************************************************/
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void aml_setup_page_tables(void)
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{
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#if IMAGE_BL31
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const mmap_region_t gxl_bl_mmap[] = {
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MAP_BL31,
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MAP_BL_CODE,
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MAP_BL_RO_DATA,
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#if USE_COHERENT_MEM
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MAP_BL_COHERENT,
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#endif
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{0}
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};
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#endif
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mmap_add(gxl_bl_mmap);
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mmap_add(gxl_mmap);
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init_xlat_tables();
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}
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/*******************************************************************************
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* Function that returns the system counter frequency
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******************************************************************************/
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unsigned int plat_get_syscnt_freq2(void)
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{
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uint32_t val;
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val = mmio_read_32(AML_SYS_CPU_CFG7);
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val &= 0xFDFFFFFF;
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mmio_write_32(AML_SYS_CPU_CFG7, val);
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val = mmio_read_32(AML_AO_TIMESTAMP_CNTL);
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val &= 0xFFFFFE00;
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mmio_write_32(AML_AO_TIMESTAMP_CNTL, val);
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return AML_OSC24M_CLK_IN_HZ;
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}
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