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switch-l4t-atf/maintainers.rst
Jorge Ramirez-Ortiz 7e532c4bf7 rcar-gen3: initial commit for the rcar-gen3 boards 
Reference code:
==============

rar_gen3: IPL and Secure Monitor Rev1.0.22
https://github.com/renesas-rcar/arm-trusted-firmware [rcar_gen3]

Author: Takuya Sakata <takuya.sakata.wz@bp.renesas.com>
Date:   Thu Aug 30 21:26:41 2018 +0900
	Update IPL and Secure Monitor Rev1.0.22

General Information:
===================

This port has been tested on the Salvator-X Soc_id r8a7795 revision
ES1.1 (uses an SPD).

Build Tested:
-------------
ATFW_OPT="LSI=H3 RCAR_DRAM_SPLIT=1 RCAR_LOSSY_ENABLE=1"
MBEDTLS_DIR=$mbedtls

$ make clean bl2 bl31 rcar PLAT=rcar ${ATFW_OPT} SPD=opteed

Other dependencies:
------------------
* mbed_tls:
  git@github.com:ARMmbed/mbedtls.git [devel]

  Merge: 68dbc94 f34a4c1
  Author: Simon Butcher <simon.butcher@arm.com>
  Date:   Thu Aug 30 00:57:28 2018 +0100

* optee_os:
  https://github.com/BayLibre/optee_os

  Until it gets merged into OP-TEE, the port requires Renesas' Trusted
  Environment with a modification to support power management.

  Author: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
  Date:   Thu Aug 30 16:49:49 2018 +0200
    plat-rcar: cpu-suspend: handle the power level
    Signed-off-by: Jorge Ramirez-Ortiz <jramirez@baylibre.com>

* u-boot:
  The port has beent tested using mainline uboot.

  Author: Fabio Estevam <festevam@gmail.com>
  Date:   Tue Sep 4 10:23:12 2018 -0300

*linux:
  The port has beent tested using mainline kernel.

  Author: Linus Torvalds <torvalds@linux-foundation.org>
  Date:   Sun Sep 16 11:52:37 2018 -0700
      Linux 4.19-rc4

Overview
---------

BOOTROM starts the cpu at EL3; In this port BL2 will therefore be entered
at this exception level (the Renesas' ATF reference tree [1] resets into
EL1 before entering BL2 - see its bl2.ld.S)

BL2 initializes DDR (and i2c to talk to the PMIC on some platforms)
before determining the boot reason (cold or warm).

During suspend all CPUs are switched off and the DDR is put in
backup mode (some kind of self-refresh mode). This means that BL2 is
always entered in a cold boot scenario.

Once BL2 boots, it determines the boot reason, writes it to shared
memory (BOOT_KIND_BASE) together with the BL31 parameters
(PARAMS_BASE) and jumps to BL31.

To all effects, BL31 is as if it is being entered in reset mode since
it still needs to initialize the rest of the cores; this is the reason
behind using direct shared memory access to  BOOT_KIND_BASE and
PARAMS_BASE instead of using registers to get to those locations (see
el3_common_macros.S and bl31_entrypoint.S for the RESET_TO_BL31 use
case).

Depending on the boot reason BL31 initializes the rest of the cores:
in case of suspend, it uses a MBOX memory region to recover the
program counters.

[1] https://github.com/renesas-rcar/arm-trusted-firmware
Tests
-----

* cpuidle
  -------
   enable kernel's cpuidle arm_idle driver and boot

* system suspend
  --------------
  $ cat suspend.sh
    #!/bin/bash
    i2cset -f -y 7 0x30 0x20 0x0F
    read -p "Switch off SW23 and press return " foo
    echo mem > /sys/power/state

* cpu hotplug:
  ------------
  $ cat offline.sh
    #!/bin/bash
    nbr=$1
    echo 0 > /sys/devices/system/cpu/cpu$nbr/online
    printf "ONLINE:  " && cat /sys/devices/system/cpu/online
    printf "OFFLINE: " && cat /sys/devices/system/cpu/offline

  $ cat online.sh
    #!/bin/bash
    nbr=$1
    echo 1 > /sys/devices/system/cpu/cpu$nbr/online
    printf "ONLINE:  " && cat /sys/devices/system/cpu/online
    printf "OFFLINE: " && cat /sys/devices/system/cpu/offline

Signed-off-by: ldts <jramirez@baylibre.com>
2018-10-17 18:38:33 +02:00

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Trusted Firmware-A maintainers
==============================
Trusted Firmware-A (TF-A) is an Arm maintained project. All contributions are
ultimately merged by the maintainers listed below. Technical ownership of some
parts of the codebase is delegated to the sub-maintainers listed below. An
acknowledgement from these sub-maintainers may be required before the
maintainers merge a contribution.
Main maintainers
----------------
:M: Dan Handley <dan.handley@arm.com>
:G: `danh-arm`_
:M: Dimitris Papastamos <dimitrs.papastamos@arm.com>
:G: `dp-arm`_
:M: Soby Mathew <soby.mathew@arm.com>
:G: `soby-mathew`_
Allwinner ARMv8 platform port
-----------------------------
:M: Andre Przywara <andre.przywara@arm.com>
:G: `Andre-ARM`_
:M: Samuel Holland <samuel@sholland.org>
:G: `smaeul`_
:F: docs/plat/allwinner.rst
:F: plat/allwinner/
:F: drivers/allwinner/
Armv7-A architecture port
-------------------------
:M: Etienne Carriere <etienne.carriere@linaro.org>
:G: `etienne-lms`_
Arm System Guidance for Infrastructure / Mobile FVP platforms
-------------------------------------------------------------
:M: Nariman Poushin <nariman.poushin@linaro.org>
:G: `npoushin`_
:F: plat/arm/css/sgi/
:F: plat/arm/css/sgm/
:F: plat/arm/board/sgi575/
:F: plat/arm/board/sgm775/
eMMC/UFS drivers
----------------
:M: Haojian Zhuang <haojian.zhuang@linaro.org>
:G: `hzhuang1`_
:F: drivers/partition/
:F: drivers/synopsys/emmc/
:F: drivers/synopsys/ufs/
:F: drivers/ufs/
:F: include/drivers/dw_ufs.h
:F: include/drivers/ufs.h
:F: include/drivers/synopsys/dw_mmc.h
HiSilicon HiKey and HiKey960 platform ports
-------------------------------------------
:M: Haojian Zhuang <haojian.zhuang@linaro.org>
:G: `hzhuang1`_
:F: docs/plat/hikey.rst
:F: docs/plat/hikey960.rst
:F: plat/hisilicon/hikey/
:F: plat/hisilicon/hikey960/
HiSilicon Poplar platform port
------------------------------
:M: Shawn Guo <shawn.guo@linaro.org>
:G: `shawnguo2`_
:F: docs/plat/poplar.rst
:F: plat/hisilicon/poplar/
MediaTek platform ports
-----------------------
:M: Yidi Lin (林以廸) <yidi.lin@mediatek.com>
:G: `mtk09422`_
:F: plat/mediatek/
Marvell platform ports and SoC drivers
--------------------------------------
:M: Konstantin Porotchkin <kostap@marvell.com>
:G: `kostapr`_
:F: docs/plat/marvell/
:F: plat/marvell/
:F: drivers/marvell/
:F: tools/doimage/
NVidia platform ports
---------------------
:M: Varun Wadekar <vwadekar@nvidia.com>
:G: `vwadekar`_
:F: docs/plat/nvidia-tegra.rst
:F: include/lib/cpus/aarch64/denver.h
:F: lib/cpus/aarch64/denver.S
:F: plat/nvidia/
NXP QorIQ Layerscape platform ports
-----------------------------------
:M: Jiafei Pan <jiafei.pan@nxp.com>
:G: `qoriq-open-source`_
:F: docs/plat/ls1043a.rst
:F: plat/layerscape/
NXP i.MX 7 WaRP7 platform port and SoC drivers
----------------------------------------------
:M: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
:G: `bryanodonoghue`_
:M: Jun Nie <jun.nie@linaro.org>
:G: `niej`_
:F: docs/plat/warp7.rst
:F: plat/imx/common/
:F: plat/imx/imx7/
:F: drivers/imx/timer/
:F: drivers/imx/uart/
:F: drivers/imx/usdhc/
NXP i.MX 8 platform port
------------------------
:M: Anson Huang <Anson.Huang@nxp.com>
:G: `Anson-Huang`_
:F: docs/plat/imx8.rst
:F: plat/imx/
OP-TEE dispatcher
-----------------
:M: Jens Wiklander <jens.wiklander@linaro.org>
:G: `jenswi-linaro`_
:F: docs/spd/optee-dispatcher.rst
:F: services/spd/opteed/
QEMU platform port
------------------
:M: Jens Wiklander <jens.wiklander@linaro.org>
:G: `jenswi-linaro`_
:F: docs/plat/qemu.rst
:F: plat/qemu/
Raspberry Pi 3 platform port
----------------------------
:M: Antonio Niño Díaz <antonio.ninodiaz@arm.com>
:G: `antonio-nino-diaz-arm`_
:F: docs/plat/rpi3.rst
:F: plat/rpi3/
Renesas rcar-gen3 platform port
-------------------------------
:M: Jorge Ramirez-Ortiz <jramirez@baylibre.com>
:G: `ldts`_
:F: docs/plat/rcar-gen3.rst
:F: plat/renesas/rcar
:F: drivers/renesas/rcar
:F: tools/renesas/rcar_layout_create
RockChip platform port
----------------------
:M: Tony Xie <tony.xie@rock-chips.com>
:G: `TonyXie06`_
:G: `rockchip-linux`_
:F: plat/rockchip/
STM32MP1 platform port
----------------------
:M: Yann Gautier <yann.gautier@st.com>
:G: `Yann-lms`_
:F: docs/plat/stm32mp1.rst
:F: drivers/st/
:F: fdts/stm32\*
:F: include/drivers/st/
:F: include/dt-bindings/\*/stm32\*
:F: plat/st/
:F: tools/stm32image/
Synquacer platform port
-----------------------
:M: Sumit Garg <sumit.garg@linaro.org>
:G: `b49020`_
:F: docs/plat/synquacer.rst
:F: plat/socionext/synquacer/
Texas Instruments platform port
-------------------------------
:M: Andrew F. Davis <afd@ti.com>
:G: `glneo`_
:F: docs/plat/ti-k3.rst
:F: plat/ti/
TLK/Trusty secure payloads
--------------------------
:M: Varun Wadekar <vwadekar@nvidia.com>
:G: `vwadekar`_
:F: docs/spd/tlk-dispatcher.rst
:F: docs/spd/trusty-dispatcher.rst
:F: include/bl32/payloads/tlk.h
:F: services/spd/tlkd/
:F: services/spd/trusty/
UniPhier platform port
----------------------
:M: Masahiro Yamada <yamada.masahiro@socionext.com>
:G: `masahir0y`_
:F: docs/plat/socionext-uniphier.rst
:F: plat/socionext/uniphier/
Xilinx platform port
--------------------
:M: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
:G: `sivadur`_
:F: docs/plat/xilinx-zynqmp.rst
:F: plat/xilinx/
.. _Andre-ARM: https://github.com/Andre-ARM
.. _Anson-Huang: https://github.com/Anson-Huang
.. _antonio-nino-diaz-arm: https://github.com/antonio-nino-diaz-arm
.. _bryanodonoghue: https://github.com/bryanodonoghue
.. _b49020: https://github.com/b49020
.. _danh-arm: https://github.com/danh-arm
.. _dp-arm: https://github.com/dp-arm
.. _etienne-lms: https://github.com/etienne-lms
.. _glneo: https://github.com/glneo
.. _hzhuang1: https://github.com/hzhuang1
.. _jenswi-linaro: https://github.com/jenswi-linaro
.. _ldts: https://github.com/ldts
.. _niej: https://github.com/niej
.. _kostapr: https://github.com/kostapr
.. _masahir0y: https://github.com/masahir0y
.. _mtk09422: https://github.com/mtk09422
.. _npoushin: https://github.com/npoushin
.. _qoriq-open-source: https://github.com/qoriq-open-source
.. _rockchip-linux: https://github.com/rockchip-linux
.. _shawnguo2: https://github.com/shawnguo2
.. _sivadur: https://github.com/sivadur
.. _smaeul: https://github.com/smaeul
.. _soby-mathew: https://github.com/soby-mathew
.. _TonyXie06: https://github.com/TonyXie06
.. _vwadekar: https://github.com/vwadekar
.. _Yann-lms: https://github.com/Yann-lms
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