switch-l4t-atf/bl1
Andrew Thoelke 167a935733 Initialise CPU contexts from entry_point_info
Consolidate all BL3-1 CPU context initialization for cold boot, PSCI
and SPDs into two functions:
*  The first uses entry_point_info to initialize the relevant
   cpu_context for first entry into a lower exception level on a CPU
*  The second populates the EL1 and EL2 system registers as needed
   from the cpu_context to ensure correct entry into the lower EL

This patch alters the way that BL3-1 determines which exception level
is used when first entering EL1 or EL2 during cold boot - this is now
fully determined by the SPSR value in the entry_point_info for BL3-3,
as set up by the platform code in BL2 (or otherwise provided to BL3-1).

In the situation that EL1 (or svc mode) is selected for a processor
that supports EL2, the context management code will now configure all
essential EL2 register state to ensure correct execution of EL1. This
allows the platform code to run non-secure EL1 payloads directly
without requiring a small EL2 stub or OS loader.

Change-Id: If9fbb2417e82d2226e47568203d5a369f39d3b0f
2014-06-23 14:55:44 +01:00
..
aarch64 Initialise CPU contexts from entry_point_info 2014-06-23 14:55:44 +01:00
bl1_main.c Move BL porting functions into platform.h 2014-05-23 17:18:54 +01:00
bl1_private.h Remove extern keyword from function declarations 2014-05-23 12:15:54 +01:00
bl1.ld.S Split platform.h into separate headers 2014-05-23 15:52:29 +01:00
bl1.mk Remove vpath usage in makefiles 2014-05-06 12:35:02 +01:00