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https://github.com/CTCaer/switch-l4t-atf.git
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09d40e0e08
Enforce full include path for includes. Deprecate old paths.
The following folders inside include/lib have been left unchanged:
- include/lib/cpus/${ARCH}
- include/lib/el3_runtime/${ARCH}
The reason for this change is that having a global namespace for
includes isn't a good idea. It defeats one of the advantages of having
folders and it introduces problems that are sometimes subtle (because
you may not know the header you are actually including if there are two
of them).
For example, this patch had to be created because two headers were
called the same way: e0ea0928d5b7 ("Fix gpio includes of mt8173 platform
to avoid collision."). More recently, this patch has had similar
problems: 46f9b2c3a282 ("drivers: add tzc380 support").
This problem was introduced in commit 4ecca33988b9 ("Move include and
source files to logical locations"). At that time, there weren't too
many headers so it wasn't a real issue. However, time has shown that
this creates problems.
Platforms that want to preserve the way they include headers may add the
removed paths to PLAT_INCLUDES, but this is discouraged.
Change-Id: I39dc53ed98f9e297a5966e723d1936d6ccf2fc8f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
132 lines
3.2 KiB
ArmAsm
132 lines
3.2 KiB
ArmAsm
/*
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* Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <bl1/bl1.h>
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#include <common/bl_common.h>
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#include <context.h>
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/* -----------------------------------------------------------------------------
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* Very simple stackless exception handlers used by BL2.
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* -----------------------------------------------------------------------------
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*/
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.globl bl2_el3_exceptions
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vector_base bl2_el3_exceptions
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/* -----------------------------------------------------
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* Current EL with SP0 : 0x0 - 0x200
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* -----------------------------------------------------
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*/
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vector_entry SynchronousExceptionSP0
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mov x0, #SYNC_EXCEPTION_SP_EL0
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SynchronousExceptionSP0
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vector_entry IrqSP0
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mov x0, #IRQ_SP_EL0
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry IrqSP0
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vector_entry FiqSP0
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mov x0, #FIQ_SP_EL0
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry FiqSP0
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vector_entry SErrorSP0
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mov x0, #SERROR_SP_EL0
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SErrorSP0
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/* -----------------------------------------------------
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* Current EL with SPx: 0x200 - 0x400
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* -----------------------------------------------------
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*/
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vector_entry SynchronousExceptionSPx
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mov x0, #SYNC_EXCEPTION_SP_ELX
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SynchronousExceptionSPx
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vector_entry IrqSPx
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mov x0, #IRQ_SP_ELX
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry IrqSPx
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vector_entry FiqSPx
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mov x0, #FIQ_SP_ELX
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry FiqSPx
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vector_entry SErrorSPx
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mov x0, #SERROR_SP_ELX
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SErrorSPx
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/* -----------------------------------------------------
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* Lower EL using AArch64 : 0x400 - 0x600
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* -----------------------------------------------------
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*/
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vector_entry SynchronousExceptionA64
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mov x0, #SYNC_EXCEPTION_AARCH64
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SynchronousExceptionA64
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vector_entry IrqA64
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mov x0, #IRQ_AARCH64
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry IrqA64
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vector_entry FiqA64
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mov x0, #FIQ_AARCH64
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry FiqA64
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vector_entry SErrorA64
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mov x0, #SERROR_AARCH64
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SErrorA64
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/* -----------------------------------------------------
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* Lower EL using AArch32 : 0x600 - 0x800
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* -----------------------------------------------------
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*/
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vector_entry SynchronousExceptionA32
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mov x0, #SYNC_EXCEPTION_AARCH32
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SynchronousExceptionA32
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vector_entry IrqA32
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mov x0, #IRQ_AARCH32
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry IrqA32
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vector_entry FiqA32
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mov x0, #FIQ_AARCH32
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry FiqA32
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vector_entry SErrorA32
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mov x0, #SERROR_AARCH32
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bl plat_report_exception
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no_ret plat_panic_handler
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end_vector_entry SErrorA32
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