switch-l4t-atf/bl31
Andrew Thoelke 5e91007424 Per-cpu data cache restructuring
This patch prepares the per-cpu pointer cache for wider use by:
* renaming the structure to cpu_data and placing in new header
* providing accessors for this CPU, or other CPUs
* splitting the initialization of the TPIDR pointer from the
  initialization of the cpu_data content
* moving the crash stack initialization to a crash stack function
* setting the TPIDR pointer very early during boot

Change-Id: Icef9004ff88f8eb241d48c14be3158087d7e49a3
2014-06-16 21:30:32 +01:00
..
aarch64 Per-cpu data cache restructuring 2014-06-16 21:30:32 +01:00
bl31_main.c Per-cpu data cache restructuring 2014-06-16 21:30:32 +01:00
bl31.ld.S Split platform.h into separate headers 2014-05-23 15:52:29 +01:00
bl31.mk Per-cpu data cache restructuring 2014-06-16 21:30:32 +01:00
context_mgmt.c Per-cpu data cache restructuring 2014-06-16 21:30:32 +01:00
cpu_data_array.c Per-cpu data cache restructuring 2014-06-16 21:30:32 +01:00
interrupt_mgmt.c Introduce interrupt registration framework in BL3-1 2014-05-22 17:46:56 +01:00
runtime_svc.c Non-Secure Interrupt support during Standard SMC processing in TSP 2014-05-23 08:46:21 +01:00