Sandrine Bailleux 5f654975bb Extend memory attributes to map non-cacheable memory ... At the moment, the memory translation library allows to create memory mappings of 2 types: - Device nGnRE memory (named MT_DEVICE in the library); - Normal, Inner Write-back non-transient, Outer Write-back non-transient memory (named MT_MEMORY in the library). As a consequence, the library code treats the memory type field as a boolean: everything that is not device memory is normal memory and vice-versa. In reality, the ARMv8 architecture allows up to 8 types of memory to be used at a single time for a given exception level. This patch reworks the memory attributes such that the memory type is now defined as an integer ranging from 0 to 7 instead of a boolean. This makes it possible to extend the list of memory types supported by the memory translation library. The priority system dictating memory attributes for overlapping memory regions has been extended to cope with these changes but the algorithm at its core has been preserved. When a memory region is re-mapped with different memory attributes, the memory translation library examines the former attributes and updates them only if the new attributes create a more restrictive mapping. This behaviour is unchanged, only the manipulation of the value has been modified to cope with the new format. This patch also introduces a new type of memory mapping in the memory translation library: MT_NON_CACHEABLE, meaning Normal, Inner Non-cacheable, Outer Non-cacheable memory. This can be useful to map a non-cacheable memory region, such as a DMA buffer for example. The rules around the Execute-Never (XN) bit in a translation table for an MT_NON_CACHEABLE memory mapping have been aligned on the rules used for MT_MEMORY mappings: - If the memory is read-only then it is also executable (XN = 0); - If the memory is read-write then it is not executable (XN = 1). The shareability field for MT_NON_CACHEABLE mappings is always set as 'Outer-Shareable'. Note that this is not strictly needed since shareability is only relevant if the memory is a Normal Cacheable memory type, but this is to align with the existing device memory mappings setup. All Device and Normal Non-cacheable memory regions are always treated as Outer Shareable, regardless of the translation table shareability attributes. This patch also removes the 'ATTR_SO' and 'ATTR_SO_INDEX' #defines. They were introduced to map memory as Device nGnRnE (formerly called "Strongly-Ordered" memory in the ARMv7 architecture) but were not used anywhere in the code base. Removing them avoids any confusion about the memory types supported by the library. Upstream platforms do not currently use the MT_NON_CACHEABLE memory type. NOTE: THIS CHANGE IS SOURCE COMPATIBLE BUT PLATFORMS THAT RELY ON THE BINARY VALUES OF `mmap_attr_t` or the `attr` argument of `mmap_add_region()` MAY BE BROKEN. Change-Id: I717d6ed79b4c845a04e34132432f98b93d661d79		2016-03-03 16:55:25 +00:00
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cache_helpers.S	Make generic code work in presence of system caches	2015-09-14 22:09:40 +01:00
misc_helpers.S	Make generic code work in presence of system caches	2015-09-14 22:09:40 +01:00
xlat_helpers.c	Reduce deep nesting of header files	2014-05-06 13:57:48 +01:00
xlat_tables.c	Extend memory attributes to map non-cacheable memory	2016-03-03 16:55:25 +00:00