switch-l4t-atf/bl32/sp_min
Jeenu Viswambharan 64ee263e20 DynamIQ: Enable MMU without using stack
Having an active stack while enabling MMU has shown coherency problems.
This patch builds on top of translation library changes that introduces
MMU-enabling without using stacks.

Previously, with HW_ASSISTED_COHERENCY, data caches were disabled while
enabling MMU only because of active stack. Now that we can enable MMU
without using stack, we can enable both MMU and data caches at the same
time.

NOTE: Since this feature depends on using translation table library v2,
disallow using translation table library v1 with HW_ASSISTED_COHERENCY.

Fixes ARM-software/tf-issues#566

Change-Id: Ie55aba0c23ee9c5109eb3454cb8fa45d74f8bbb2
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
2018-06-27 11:31:30 +01:00
..
aarch32 DynamIQ: Enable MMU without using stack 2018-06-27 11:31:30 +01:00
sp_min_main.c Rename 'smcc' to 'smccc' 2018-03-21 10:49:27 +00:00
sp_min_private.h bl32: add secure interrupt handling in AArch32 sp_min 2017-08-09 15:48:53 +02:00
sp_min.ld.S Add comments about mismatched TCR_ELx and xlat tables 2018-02-27 09:55:01 +00:00
sp_min.mk Rename symbols and files relating to CVE-2017-5715 2018-05-23 12:45:48 +01:00
wa_cve_2017_5715_bpiall.S Rename symbols and files relating to CVE-2017-5715 2018-05-23 12:45:48 +01:00
wa_cve_2017_5715_icache_inv.S Rename symbols and files relating to CVE-2017-5715 2018-05-23 12:45:48 +01:00