Etienne Carriere 70896274ba ARMv7 requires the clear exclusive access at monitor entry ...

Clear exclusive monitor on SMC and FIQ entry for ARMv7 cores.

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

2017-11-08 13:49:12 +01:00

..

aarch32

ARMv7 requires the clear exclusive access at monitor entry

2017-11-08 13:49:12 +01:00

sp_min_main.c

Set NS version SCTLR during warmboot path

2017-09-05 22:24:14 +01:00

sp_min_private.h

bl32: add secure interrupt handling in AArch32 sp_min

2017-08-09 15:48:53 +02:00

sp_min.ld.S

BL31: Introduce Publish and Subscribe framework

2017-10-23 08:15:11 +01:00

sp_min.mk

bl32: add secure interrupt handling in AArch32 sp_min

2017-08-09 15:48:53 +02:00