CTCaer/switch-l4t-atf
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switch-l4t-atf/plat/nvidia/tegra/common
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Varun Wadekar 14a1c0edf0 Tegra: fix the NS DRAM address calculation logic 
This patch fixes the logic used to calculate the end of NS memory
aperture. The functions allows zero sized NS apertures as that is
a valid requirement for some use cases. e.g. VPR resize.

Change-Id: Ie966e0ea2f9c6888d21c38e734003704094b3720
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2017-05-01 15:33:44 -07:00
..
aarch64 Tegra: no need to re-init the same console 2017-04-13 14:18:42 -07:00
drivers Tegra: memctrl_v2: zero out NS Video memory carveout region 2017-05-01 15:33:31 -07:00
tegra_bl31_setup.c Tegra: fix the NS DRAM address calculation logic 2017-05-01 15:33:44 -07:00
tegra_common.mk Tegra: group platform settings together 2017-04-26 13:48:00 -07:00
tegra_delay_timer.c Tegra: introduce delay timer support 2015-07-17 19:06:36 +05:30
tegra_fiq_glue.c Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1 2017-02-28 08:50:01 -08:00
tegra_gic.c Tegra: GIC: differentiate between FIQs targeted towards EL3/S-EL1 2017-02-28 08:50:01 -08:00
tegra_platform.c Tegra: platform: support Tegra186 chip id 2017-04-13 14:16:14 -07:00
tegra_pm.c Tegra: Add support for fake system suspend 2017-04-13 14:18:42 -07:00
tegra_sip_calls.c Tegra186: Support AARCH32/64 encoding for MCE calls 2017-04-17 11:54:33 -07:00
tegra_topology.c Tegra: allow platforms to override plat_core_pos_by_mpidr() 2017-04-07 09:32:35 -07:00