Etienne Carriere 86606eb51e cpu log buffer size depends on cache line size ... Platform may use specific cache line sizes. Since CACHE_WRITEBACK_GRANULE defines the platform specific cache line size, it is used to define the size of the cpu data structure CPU_DATA_SIZE aligned on cache line size. Introduce assembly macro 'mov_imm' for AArch32 to simplify implementation of function '_cpu_data_by_index'. Change-Id: Ic2d49ffe0c3e51649425fd9c8c99559c582ac5a1 Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>		2017-09-01 10:22:20 +02:00
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aarch32	Exit early if size zero for cache helpers	2017-06-21 17:46:28 +01:00
aarch64	Exit early if size zero for cache helpers	2017-06-21 17:46:28 +01:00
compiler-rt	Import ctzdi2.c from LLVM compiler-rt	2017-07-26 09:28:23 +01:00
cpus	Fix order of #includes	2017-07-12 14:45:31 +01:00
el3_runtime	cpu log buffer size depends on cache line size	2017-09-01 10:22:20 +02:00
libfdt	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
locks	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
optee	Add Trusted OS extra image parsing support for ARM standard platforms	2017-08-09 18:06:05 +08:00
pmf	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
psci	lib: psci: early suspend handler for platforms	2017-07-31 11:41:17 -07:00
semihosting	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
stack_protector	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
stdlib	Use standard UNIX file:line format in assert	2017-07-19 05:57:40 +01:00
xlat_tables	xlat lib: Fix some types	2017-07-26 09:28:23 +01:00
xlat_tables_v2	xlat lib v2: Fix sign of debug loop variable	2017-08-01 09:18:51 +01:00