switch-l4t-atf/lib/aarch64
Soby Mathew 8e85791677 Add support for level specific cache maintenance operations
This patch adds level specific cache maintenance functions
to cache_helpers.S. The new functions 'dcsw_op_levelx',
where '1 <= x <= 3', allow to perform cache maintenance by
set/way for that particular level of cache.  With this patch,
functions to support cache maintenance upto level 3 have
been implemented since it is the highest cache level for
most ARM SoCs.

These functions are now utilized in CPU specific power down
sequences to implement them as mandated by processor specific
technical reference manual.

Change-Id: Icd90ce6b51cff5a12863bcda01b93601417fd45c
2014-10-29 17:38:56 +00:00
..
cache_helpers.S Add support for level specific cache maintenance operations 2014-10-29 17:38:56 +00:00
misc_helpers.S Implement an assert() callable from assembly code 2014-07-28 11:01:49 +01:00
xlat_helpers.c Reduce deep nesting of header files 2014-05-06 13:57:48 +01:00
xlat_tables.c Simplify management of SCTLR_EL3 and SCTLR_EL1 2014-07-28 10:10:22 +01:00