Etienne Carriere 94f4700017 ARMv7 architecture have specific system registers ...

Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org>

2017-11-08 13:49:36 +01:00

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bl1

FWU: Introduce FWU_SMC_IMAGE_RESET

2017-06-01 14:52:12 +01:00

bl31

GIC: Allow specifying interrupt properties

2017-10-16 16:50:02 +01:00

bl32

bl32: add secure interrupt handling in AArch32 sp_min

2017-08-09 15:48:53 +02:00

common

ARMv7 does not support SDCR

2017-11-08 13:49:32 +01:00

drivers

plat/arm: enlarge the BL2 size on Arm platforms when TBB is enabled

2017-10-25 09:27:15 +08:00

lib

ARMv7 architecture have specific system registers

2017-11-08 13:49:36 +01:00

plat

Merge pull request #1137 from soby-mathew/sm/arm_plat_en_gicv3_save

2017-11-03 13:12:48 +00:00

services

Use SPDX license identifiers

2017-05-03 09:39:28 +01:00

tools_share

Support Trusted OS firmware extra images in TF tools

2017-08-09 18:06:05 +08:00