Chris Kay 68120783d6 feat(mpmm): add support for MPMM ... MPMM - the Maximum Power Mitigation Mechanism - is an optional microarchitectural feature present on some Armv9-A cores, introduced with the Cortex-X2, Cortex-A710 and Cortex-A510 cores. MPMM allows the SoC firmware to detect and limit high activity events to assist in SoC processor power domain dynamic power budgeting and limit the triggering of whole-rail (i.e. clock chopping) responses to overcurrent conditions. This feature is enabled via the `ENABLE_MPMM` build option. Configuration can be done via FCONF by enabling `ENABLE_MPMM_FCONF`, or by via the plaform-implemented `plat_mpmm_topology` function. Change-Id: I77da82808ad4744ece8263f0bf215c5a091c3167 Signed-off-by: Chris Kay <chris.kay@arm.com>		2021-10-26 12:15:42 +01:00
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aarch64	refactor(gpt): productize and refactor GPT library	2021-10-05 16:24:57 -05:00
bl31_context_mgmt.c	feat(rme): add context management changes for FEAT_RME	2021-10-05 18:41:35 +02:00
bl31_main.c	feat(rme): add ENABLE_RME build option and support for RMM image	2021-10-05 11:49:59 -05:00
bl31.ld.S	Increase type widths to satisfy width requirements	2020-10-12 10:55:03 -05:00
bl31.mk	feat(mpmm): add support for MPMM	2021-10-26 12:15:42 +01:00
ehf.c	Minor changes to documentation and comments	2019-02-28 13:35:21 +00:00
interrupt_mgmt.c	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00