CTCaer/switch-l4t-atf
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Varun Wadekar e10842167b Tegra: init normal/crash console for platforms 
The BL2 fills in the UART controller ID to be used as the normal as
well as the crash console on Tegra platforms. The controller ID to
UART controller base address mapping is handled by each Tegra SoC
the base addresses might change across Tegra chips.

This patch adds the handler to parse the platform params to get the
UART ID for the per-soc handlers.

Change-Id: I4d167b20a59aaf52a31e2a8edf94d8d6f89598fa
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2017-02-22 09:16:34 -08:00
..
nvidia-tegra.md Tegra: init normal/crash console for platforms 2017-02-22 09:16:34 -08:00
qemu.md Add support for QEMU virt ARMv8-A target 2016-06-09 11:23:28 +02:00
xilinx-zynqmp.md zynqmp: remove RESET_TO_BL31=1 from build instruction 2017-02-06 17:59:58 +09:00