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https://github.com/CTCaer/switch-l4t-atf.git
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85a181ce38
This patch migrates the rest of Trusted Firmware excluding Secure Payload and the dispatchers to the new platform and context management API. The per-cpu data framework APIs which took MPIDRs as their arguments are deleted and only the ones which take core index as parameter are retained. Change-Id: I839d05ad995df34d2163a1cfed6baa768a5a595d
140 lines
5.0 KiB
C
140 lines
5.0 KiB
C
/*
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* Copyright (c) 2014-2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __CPU_DATA_H__
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#define __CPU_DATA_H__
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/* Offsets for the cpu_data structure */
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#define CPU_DATA_CRASH_BUF_OFFSET 0x18
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#if CRASH_REPORTING
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#define CPU_DATA_LOG2SIZE 7
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#else
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#define CPU_DATA_LOG2SIZE 6
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#endif
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/* need enough space in crash buffer to save 8 registers */
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#define CPU_DATA_CRASH_BUF_SIZE 64
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#define CPU_DATA_CPU_OPS_PTR 0x10
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#ifndef __ASSEMBLY__
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#include <arch_helpers.h>
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#include <cassert.h>
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#include <platform_def.h>
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#include <psci.h>
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#include <stdint.h>
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/* Offsets for the cpu_data structure */
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#define CPU_DATA_PSCI_LOCK_OFFSET __builtin_offsetof\
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(cpu_data_t, psci_svc_cpu_data.pcpu_bakery_info)
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#if PLAT_PCPU_DATA_SIZE
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#define CPU_DATA_PLAT_PCPU_OFFSET __builtin_offsetof\
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(cpu_data_t, platform_cpu_data)
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#endif
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/*******************************************************************************
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* Function & variable prototypes
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******************************************************************************/
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/*******************************************************************************
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* Cache of frequently used per-cpu data:
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* Pointers to non-secure and secure security state contexts
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* Address of the crash stack
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* It is aligned to the cache line boundary to allow efficient concurrent
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* manipulation of these pointers on different cpus
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*
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* TODO: Add other commonly used variables to this (tf_issues#90)
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*
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* The data structure and the _cpu_data accessors should not be used directly
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* by components that have per-cpu members. The member access macros should be
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* used for this.
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******************************************************************************/
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typedef struct cpu_data {
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void *cpu_context[2];
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uint64_t cpu_ops_ptr;
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#if CRASH_REPORTING
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uint64_t crash_buf[CPU_DATA_CRASH_BUF_SIZE >> 3];
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#endif
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struct psci_cpu_data psci_svc_cpu_data;
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#if PLAT_PCPU_DATA_SIZE
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uint8_t platform_cpu_data[PLAT_PCPU_DATA_SIZE];
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#endif
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} __aligned(CACHE_WRITEBACK_GRANULE) cpu_data_t;
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#if CRASH_REPORTING
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/* verify assembler offsets match data structures */
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CASSERT(CPU_DATA_CRASH_BUF_OFFSET == __builtin_offsetof
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(cpu_data_t, crash_buf),
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assert_cpu_data_crash_stack_offset_mismatch);
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#endif
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CASSERT((1 << CPU_DATA_LOG2SIZE) == sizeof(cpu_data_t),
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assert_cpu_data_log2size_mismatch);
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CASSERT(CPU_DATA_CPU_OPS_PTR == __builtin_offsetof
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(cpu_data_t, cpu_ops_ptr),
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assert_cpu_data_cpu_ops_ptr_offset_mismatch);
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struct cpu_data *_cpu_data_by_index(uint32_t cpu_index);
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/* Return the cpu_data structure for the current CPU. */
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static inline struct cpu_data *_cpu_data(void)
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{
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return (cpu_data_t *)read_tpidr_el3();
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}
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/**************************************************************************
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* APIs for initialising and accessing per-cpu data
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*************************************************************************/
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void init_cpu_data_ptr(void);
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void init_cpu_ops(void);
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#define get_cpu_data(_m) _cpu_data()->_m
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#define set_cpu_data(_m, _v) _cpu_data()->_m = _v
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#define get_cpu_data_by_index(_ix, _m) _cpu_data_by_index(_ix)->_m
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#define set_cpu_data_by_index(_ix, _m, _v) _cpu_data_by_index(_ix)->_m = _v
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#define flush_cpu_data(_m) flush_dcache_range((uint64_t) \
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&(_cpu_data()->_m), \
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sizeof(_cpu_data()->_m))
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#define inv_cpu_data(_m) inv_dcache_range((uint64_t) \
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&(_cpu_data()->_m), \
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sizeof(_cpu_data()->_m))
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#define flush_cpu_data_by_index(_ix, _m) \
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flush_dcache_range((uint64_t) \
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&(_cpu_data_by_index(_ix)->_m), \
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sizeof(_cpu_data_by_index(_ix)->_m))
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#endif /* __ASSEMBLY__ */
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#endif /* __CPU_DATA_H__ */
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