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The current implementation of the memory mapping API favours mapping memory regions using the biggest possible block size in order to reduce the number of translation tables needed. In some cases, this behaviour might not be desirable. When translation tables are edited at run-time, coarse-grain mappings like that might need splitting into finer-grain tables. This operation has a performance cost. The MAP_REGION2() macro allows to specify the granularity of translation tables used for the initial mapping of a memory region. This might increase performance for memory regions that are likely to be edited in the future, at the expense of a potentially increased memory footprint. The Translation Tables Library Design Guide has been updated to explain the use case for this macro. Also added a few intermediate titles to make the guide easier to digest. Change-Id: I04de9302e0ee3d326b8877043a9f638766b81b7b Co-authored-by: Sandrine Bailleux <sandrine.bailleux@arm.com> Co-authored-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
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diagrams | ||
plat | ||
spd | ||
arm-sip-service.rst | ||
auth-framework.rst | ||
change-log.rst | ||
cpu-specific-build-macros.rst | ||
firmware-design.rst | ||
firmware-update.rst | ||
interrupt-framework-design.rst | ||
platform-migration-guide.rst | ||
porting-guide.rst | ||
psci-lib-integration-guide.rst | ||
psci-pd-tree.rst | ||
reset-design.rst | ||
rt-svc-writers-guide.rst | ||
trusted-board-boot.rst | ||
user-guide.rst | ||
xlat-tables-lib-v2-design.rst |