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https://github.com/Cxbx-Reloaded/unicorn.git
synced 2025-01-05 18:22:11 +00:00
change uch to uc_struct (target-i386)
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e7a8eb8976
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@ -949,7 +949,7 @@ void helper_syscall(CPUX86State *env, int next_eip_addend)
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struct uc_struct *uc = env->uc;
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if (uc->hook_syscall_idx) {
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((uc_cb_insn_syscall_t)uc->hook_callbacks[uc->hook_syscall_idx].callback)(
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(uch)uc, uc->hook_callbacks[uc->hook_syscall_idx].user_data);
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uc, uc->hook_callbacks[uc->hook_syscall_idx].user_data);
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env->eip += next_eip_addend;
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}
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@ -4756,7 +4756,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s,
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// Unicorn: trace this instruction on request
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if (env->uc->hook_insn) {
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trace = hook_find((uch)env->uc, UC_HOOK_CODE, pc_start);
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trace = hook_find(env->uc, UC_HOOK_CODE, pc_start);
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if (trace) {
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if (s->last_cc_op != s->cc_op) {
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sync_eflags(s, tcg_ctx);
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@ -8353,7 +8353,7 @@ static inline void gen_intermediate_code_internal(uint8_t *gen_opc_cc_op,
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// Only hook this block if it is not broken from previous translation due to
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// full translation cache
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if (env->uc->hook_block && !env->uc->block_full) {
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struct hook_struct *trace = hook_find((uch)env->uc, UC_HOOK_BLOCK, pc_start);
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struct hook_struct *trace = hook_find(env->uc, UC_HOOK_BLOCK, pc_start);
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if (trace) {
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env->uc->block_addr = pc_start;
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gen_uc_tracecode(tcg_ctx, 0xf8f8f8f8, trace->callback, env->uc, pc_start, trace->user_data);
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@ -48,12 +48,9 @@ void x86_release(void *ctx)
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g_free(s->tb_ctx.tbs);
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}
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void x86_reg_reset(uch handle)
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void x86_reg_reset(struct uc_struct *uc)
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{
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struct uc_struct *uc = (struct uc_struct *) handle;
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CPUArchState *env;
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env = first_cpu->env_ptr;
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CPUArchState *env = first_cpu->env_ptr;
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env->invalid_error = UC_ERR_OK; // no error
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memset(env->regs, 0, sizeof(env->regs));
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@ -138,12 +135,9 @@ void x86_reg_reset(uch handle)
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}
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}
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int x86_reg_read(uch handle, unsigned int regid, void *value)
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int x86_reg_read(struct uc_struct *uc, unsigned int regid, void *value)
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{
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CPUState *mycpu;
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struct uc_struct *uc = (struct uc_struct *) handle;
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mycpu = first_cpu;
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CPUState *mycpu = first_cpu;
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switch(uc->mode) {
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default:
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@ -540,12 +534,9 @@ int x86_reg_read(uch handle, unsigned int regid, void *value)
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#define WRITE_BYTE_H(x, b) (x = (x & ~0xff00) | (b & 0xff))
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#define WRITE_BYTE_L(x, b) (x = (x & ~0xff) | (b & 0xff))
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int x86_reg_write(uch handle, unsigned int regid, const void *value)
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int x86_reg_write(struct uc_struct *uc, unsigned int regid, const void *value)
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{
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CPUState *mycpu;
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struct uc_struct *uc = (struct uc_struct *) handle;
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mycpu = first_cpu;
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CPUState *mycpu = first_cpu;
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switch(uc->mode) {
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default:
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@ -5,10 +5,10 @@
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#define UC_QEMU_TARGET_I386_H
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// functions to read & write registers
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int x86_reg_read(uch handle, unsigned int regid, void *value);
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int x86_reg_write(uch handle, unsigned int regid, const void *value);
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int x86_reg_read(struct uc_struct *uc, unsigned int regid, void *value);
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int x86_reg_write(struct uc_struct *uc, unsigned int regid, const void *value);
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void x86_reg_reset(uch handle);
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void x86_reg_reset(struct uc_struct *uc);
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void x86_uc_init(struct uc_struct* uc);
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int x86_uc_machine_init(struct uc_struct *uc);
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