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box64/tests/ref17.txt

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Improved and enhanced test17 (SSE testing)
2022-03-30 08:53:51 +00:00
ucomiss 1.000000, 2.000000 => 0x203
ucomiss 2.000000, 1.000000 => 0x202
ucomiss 1.000000, inf => 0x203
ucomiss inf, 1.000000 => 0x202
ucomiss 1.000000, -inf => 0x202
ucomiss -inf, 1.000000 => 0x203
ucomiss 1.000000, nan => 0x203
ucomiss nan, 1.000000 => 0x203
Improved CMPSS/CMPSD opcodes, improved test17 ([DYNAREC] too, and improved MINSS/MAXSS/MINSD/MAXSD too)
2021-11-07 14:06:55 +00:00
ucomiss 1.000000, 1.000000 => 0x242
ucomiss 1.000000, 1.000000 => 0x242
ucomiss inf, inf => 0x242
Improved and enhanced test17 (SSE testing)
2022-03-30 08:53:51 +00:00
ucomiss -inf, inf => 0x203
ucomiss inf, -inf => 0x202
ucomiss nan, nan => 0x203
Improved CMPSS/CMPSD opcodes, improved test17 ([DYNAREC] too, and improved MINSS/MAXSS/MINSD/MAXSD too)
2021-11-07 14:06:55 +00:00
minss 1, 2 => 1
minss 2, 1 => 1
minss -inf, 2 => -inf
minss 2, -inf => -inf
minss inf, 2 => 2
minss 2, inf => 2
minss nan, 2 => 2
minss 2, nan => nan
minss nan, 3.40282e+38 => 3.40282e+38
minss 3.40282e+38, nan => nan
minss -inf, 3.40282e+38 => -inf
minss 3.40282e+38, -inf => -inf
minss inf, 3.40282e+38 => 3.40282e+38
minss 3.40282e+38, inf => 3.40282e+38
maxss 1, 2 => 2
maxss 2, 1 => 2
maxss -inf, 2 => 2
maxss 2, -inf => 2
maxss inf, 2 => inf
maxss 2, inf => inf
maxss nan, 2 => 2
maxss 2, nan => nan
maxss nan, 3.40282e+38 => 3.40282e+38
maxss 3.40282e+38, nan => nan
maxss -inf, 3.40282e+38 => 3.40282e+38
maxss 3.40282e+38, -inf => 3.40282e+38
maxss inf, 3.40282e+38 => inf
maxss 3.40282e+38, inf => inf
cmpss 0 1.000000, 2.000000 => 0x0
cmpss 0 2.000000, 1.000000 => 0x0
cmpss 0 1.000000, inf => 0x0
cmpss 0 inf, 1.000000 => 0x0
cmpss 0 1.000000, -inf => 0x0
cmpss 0 -inf, 1.000000 => 0x0
cmpss 0 1.000000, nan => 0x0
cmpss 0 nan, 1.000000 => 0x0
cmpss 0 1.000000, 1.000000 => 0xffffffff
cmpss 0 1.000000, 1.000000 => 0xffffffff
cmpss 0 inf, inf => 0xffffffff
cmpss 0 -inf, inf => 0x0
cmpss 0 inf, -inf => 0x0
cmpss 0 nan, nan => 0x0
cmpss 1 1.000000, 2.000000 => 0xffffffff
cmpss 1 2.000000, 1.000000 => 0x0
cmpss 1 1.000000, inf => 0xffffffff
cmpss 1 inf, 1.000000 => 0x0
cmpss 1 1.000000, -inf => 0x0
cmpss 1 -inf, 1.000000 => 0xffffffff
cmpss 1 1.000000, nan => 0x0
cmpss 1 nan, 1.000000 => 0x0
cmpss 1 1.000000, 1.000000 => 0x0
cmpss 1 1.000000, 1.000000 => 0x0
cmpss 1 inf, inf => 0x0
cmpss 1 -inf, inf => 0xffffffff
cmpss 1 inf, -inf => 0x0
cmpss 1 nan, nan => 0x0
cmpss 2 1.000000, 2.000000 => 0xffffffff
cmpss 2 2.000000, 1.000000 => 0x0
cmpss 2 1.000000, inf => 0xffffffff
cmpss 2 inf, 1.000000 => 0x0
cmpss 2 1.000000, -inf => 0x0
cmpss 2 -inf, 1.000000 => 0xffffffff
cmpss 2 1.000000, nan => 0x0
cmpss 2 nan, 1.000000 => 0x0
cmpss 2 1.000000, 1.000000 => 0xffffffff
cmpss 2 1.000000, 1.000000 => 0xffffffff
cmpss 2 inf, inf => 0xffffffff
cmpss 2 -inf, inf => 0xffffffff
cmpss 2 inf, -inf => 0x0
cmpss 2 nan, nan => 0x0
cmpss 3 1.000000, 2.000000 => 0x0
cmpss 3 2.000000, 1.000000 => 0x0
cmpss 3 1.000000, inf => 0x0
cmpss 3 inf, 1.000000 => 0x0
cmpss 3 1.000000, -inf => 0x0
cmpss 3 -inf, 1.000000 => 0x0
cmpss 3 1.000000, nan => 0xffffffff
cmpss 3 nan, 1.000000 => 0xffffffff
cmpss 3 1.000000, 1.000000 => 0x0
cmpss 3 1.000000, 1.000000 => 0x0
cmpss 3 inf, inf => 0x0
cmpss 3 -inf, inf => 0x0
cmpss 3 inf, -inf => 0x0
cmpss 3 nan, nan => 0xffffffff
cmpss 4 1.000000, 2.000000 => 0xffffffff
cmpss 4 2.000000, 1.000000 => 0xffffffff
cmpss 4 1.000000, inf => 0xffffffff
cmpss 4 inf, 1.000000 => 0xffffffff
cmpss 4 1.000000, -inf => 0xffffffff
cmpss 4 -inf, 1.000000 => 0xffffffff
cmpss 4 1.000000, nan => 0xffffffff
cmpss 4 nan, 1.000000 => 0xffffffff
cmpss 4 1.000000, 1.000000 => 0x0
cmpss 4 1.000000, 1.000000 => 0x0
cmpss 4 inf, inf => 0x0
cmpss 4 -inf, inf => 0xffffffff
cmpss 4 inf, -inf => 0xffffffff
cmpss 4 nan, nan => 0xffffffff
cmpss 5 1.000000, 2.000000 => 0x0
cmpss 5 2.000000, 1.000000 => 0xffffffff
cmpss 5 1.000000, inf => 0x0
cmpss 5 inf, 1.000000 => 0xffffffff
cmpss 5 1.000000, -inf => 0xffffffff
cmpss 5 -inf, 1.000000 => 0x0
cmpss 5 1.000000, nan => 0xffffffff
cmpss 5 nan, 1.000000 => 0xffffffff
cmpss 5 1.000000, 1.000000 => 0xffffffff
cmpss 5 1.000000, 1.000000 => 0xffffffff
cmpss 5 inf, inf => 0xffffffff
cmpss 5 -inf, inf => 0x0
cmpss 5 inf, -inf => 0xffffffff
cmpss 5 nan, nan => 0xffffffff
cmpss 6 1.000000, 2.000000 => 0x0
cmpss 6 2.000000, 1.000000 => 0xffffffff
cmpss 6 1.000000, inf => 0x0
cmpss 6 inf, 1.000000 => 0xffffffff
cmpss 6 1.000000, -inf => 0xffffffff
cmpss 6 -inf, 1.000000 => 0x0
cmpss 6 1.000000, nan => 0xffffffff
cmpss 6 nan, 1.000000 => 0xffffffff
cmpss 6 1.000000, 1.000000 => 0x0
cmpss 6 1.000000, 1.000000 => 0x0
cmpss 6 inf, inf => 0x0
cmpss 6 -inf, inf => 0x0
cmpss 6 inf, -inf => 0xffffffff
cmpss 6 nan, nan => 0xffffffff
cmpss 7 1.000000, 2.000000 => 0xffffffff
cmpss 7 2.000000, 1.000000 => 0xffffffff
cmpss 7 1.000000, inf => 0xffffffff
cmpss 7 inf, 1.000000 => 0xffffffff
cmpss 7 1.000000, -inf => 0xffffffff
cmpss 7 -inf, 1.000000 => 0xffffffff
cmpss 7 1.000000, nan => 0x0
cmpss 7 nan, 1.000000 => 0x0
cmpss 7 1.000000, 1.000000 => 0xffffffff
cmpss 7 1.000000, 1.000000 => 0xffffffff
cmpss 7 inf, inf => 0xffffffff
cmpss 7 -inf, inf => 0xffffffff
cmpss 7 inf, -inf => 0xffffffff
cmpss 7 nan, nan => 0x0
Improved test17 ([DYNAREC] Added 66 0F 38 16 opcode, fixed 66 0F 38 24/34 opcodes)
2022-03-30 10:17:52 +00:00
pshufb(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0xff 0x80 0x2 0x2 0xff 0x0 0x0 0xff 0xfe 0x81 0x0 0x3 0x72 0x32 0xff 0x80
phaddw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x7fff 0x7fff 0x3 0x8004 0xffff 0xfffe 0x9050 0x7fff
phaddd(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0x7fffffff 0x7fffffff 0x80000001 0x3
phaddsw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x8000 0x7fff 0x3 0x8004 0xffff 0xfffe 0x9050 0x8000
pmaddubsw(0x80ff 0x7f 0x201 0x8103 0x84fe 0x5272 0xa5 0x32c0 , 0x100 0x1505 0x8020 0xff 0x708 0x681 0xf0a 0x110 ) = 0x80 0x27b 0xff20 0xfffd 0xb8c 0xc95e 0x672 0xc32
phsubw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x7fff 0x7fff 0xffff 0x8002 0x1 0x0 0x7050 0x7ffd
psignb(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0x0 0x80 0x7f 0x0 0x1 0xfe 0xfd 0x0 0xfe 0x84 0x8e 0x52 0xa5 0x0 0xc0 0x32
psignw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x1 0x8000 0x8001 0x0 0x1 0xfffe 0xfffd 0x7fff
psignd(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0xffffffff 0x80000000 0x7fffffff 0x0
pmulhrsw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x1 0x8001 0xffff 0x0 0x0 0xfffe 0x0 0x7ffe
pblendvps(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe , 0x1 0x80000000 0x80000005 0xfffe ) = 0xffffffff 0x80000000 0x5 0x0
ptestz(0x80000000ffffffff 0x7fffffff , 0x8000000000000001 0xfffffffe00000005 ) = 0
ptestc(0x80000000ffffffff 0x7fffffff , 0x8000000000000001 0xfffffffe00000005 ) = 0
ptestnzc(0x80000000ffffffff 0x7fffffff , 0x8000000000000001 0xfffffffe00000005 ) = 1
Improved and enhanced test17 (SSE testing)
2022-03-30 08:53:51 +00:00
pabsb(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 ) = 0x1 0x80 0x7f 0x0 0x1 0x2 0x3 0x7f 0x2 0x7c 0x72 0x52 0x5b 0x0 0x40 0x32
pabsw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 ) = 0x1 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x7fff
pabsd(0xffffffff 0x80000000 0x7fffffff 0x0 ) = 0x1 0x80000000 0x7fffffff 0x0
Improved test17 ([DYNAREC] Added 66 0F 38 16 opcode, fixed 66 0F 38 24/34 opcodes)
2022-03-30 10:17:52 +00:00
pmovsxbw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 ) = 0xffff 0xffff 0x0 0xff80 0xffff 0x7f 0x0 0x0
pmovsxbd(0xffffffff 0x80000000 0x7fffffff 0x0 ) = 0xffffffff 0xffffffff 0xffffffff 0xffffffff
pmovsxbq(0xffffffffffffffff 0x8000000000000000 ) = 0xffffffffffffffff 0xffffffffffffffff
pmovsxwd(0xffffffff 0x80000000 0x7fffffff 0x0 ) = 0xffffffff 0xffffffff 0x0 0xffff8000
pmovsxwq(0xffffffffffffffff 0x8000000000000000 ) = 0xffffffffffffffff 0xffffffffffffffff
pmovsxdq(0xffffffffffffffff 0x8000000000000000 ) = 0xffffffffffffffff 0xffffffffffffffff
pmovzxbw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 ) = 0xff 0xff 0x0 0x80 0xff 0x7f 0x0 0x0
pmovzxbd(0xffffffff 0x80000000 0x7fffffff 0x0 ) = 0xff 0xff 0xff 0xff
pmovzxbq(0xffffffffffffffff 0x8000000000000000 ) = 0xff 0xff
pmovzxwd(0xffffffff 0x80000000 0x7fffffff 0x0 ) = 0xffff 0xffff 0x0 0x8000
pmovzxwq(0xffffffffffffffff 0x8000000000000000 ) = 0xffff 0xffff
pmovzxdq(0xffffffffffffffff 0x8000000000000000 ) = 0xffffffff 0xffffffff
Improved test17 (sse), and fixed NAN bordercase for PSQRTPD opcode
2022-03-31 07:11:54 +00:00
pminsd(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0xffffffff 0x80000000 0x5 0xfffffffe
pmaxsd(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0x1 0x80000000 0x7fffffff 0x0
pblendw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 0) = 0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001
pblendw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 255) = 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001
pblendw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 170) = 0xffff 0x7fff 0x7fff 0xffff 0x1 0x9000 0x3 0x8001
pblendw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 2) = 0xffff 0x7fff 0x7fff 0x0 0x1 0x2 0x3 0x8001
palignr(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 0) = 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1
palignr(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 2) = 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 0xff 0x80
palignr(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 7) = 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 0xff 0x80 0x7f 0x0 0x1 0x2 0x3
palignr(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 15) = 0x1 0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0
palignr(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 16) = 0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32
palignr(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 255) = 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
movmskpd(0xffffffffffffffff 0x8000000000000000 ) = 0x3
psqrtpd(1 2 ) = 1 1.41421
psqrtpd(0 -2 ) = 0 0xfff8000000000000
psqrtpd(inf -inf ) = inf 0xfff8000000000000
psqrtpd(0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -0
More test17 impovements, fixed NAN for mulpd ([DYNAREC] too, introducing BOX64_DYNAREC_FASTNAN env. var. to keep old faster behaviour selectable)
2022-03-31 08:28:18 +00:00
andpd(1 2 , 0 -2 ) = 0 2
andpd(0 -2 , inf -inf ) = 0 -2
andpd(1 2 , 0x7ff8000000000000 -0 ) = 1 0
andpd(0 -2 , 0x7ff8000000000000 -0 ) = 0 -0
andpd(inf -inf , 0x7ff8000000000000 -0 ) = inf -0
andpd(0x7ff8000000000000 -0 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -0
andnpd(1 2 , 0 -2 ) = 0 -0
andnpd(0 -2 , inf -inf ) = inf 1
andnpd(1 2 , 0x7ff8000000000000 -0 ) = 3 -0
andnpd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 0
andnpd(inf -inf , 0x7ff8000000000000 -0 ) = 1.11254e-308 0
andnpd(0x7ff8000000000000 -0 , 0x7ff8000000000000 -0 ) = 0 0
orpd(1 2 , 0 -2 ) = 1 -2
orpd(0 -2 , inf -inf ) = inf -inf
orpd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -2
orpd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -2
orpd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -inf
orpd(0x7ff8000000000000 -0 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -0
xorpd(1 2 , 0 -2 ) = 1 -0
xorpd(0 -2 , inf -inf ) = inf 1
xorpd(1 2 , 0x7ff8000000000000 -0 ) = 3 -2
xorpd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 2
xorpd(inf -inf , 0x7ff8000000000000 -0 ) = 1.11254e-308 inf
xorpd(0x7ff8000000000000 -0 , 0x7ff8000000000000 -0 ) = 0 0
addpd(1 2 , 0 -2 ) = 1 0
addpd(0 -2 , inf -inf ) = inf -inf
addpd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 2
addpd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -2
addpd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -inf
addpd(0x7ff8000000000000 -0 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -0
mulpd(1 2 , 0 -2 ) = 0 -4
mulpd(0 -2 , inf -inf ) = 0xfff8000000000000 inf
mulpd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -0
mulpd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 0
mulpd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 0xfff8000000000000
mulpd(0x7ff8000000000000 -0 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 0
More cases to test17, and added -NAN generation to divpd ([DYNAREC] too)
2022-03-31 08:42:08 +00:00
subpd(1 2 , 0 -2 ) = 1 4
subpd(0 -2 , inf -inf ) = -inf inf
subpd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 2
subpd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -2
subpd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -inf
subpd(0x7ff8000000000000 -0 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 0
minpd(1 2 , 0 -2 ) = 0 -2
minpd(0 -2 , inf -inf ) = 0 -inf
minpd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -0
minpd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -2
minpd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -inf
minpd(0x7ff8000000000000 -0 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -0
divpd(1 2 , 0 -2 ) = inf -1
divpd(0 -2 , inf -inf ) = 0 0
divpd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -inf
divpd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 inf
divpd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 inf
divpd(0x7ff8000000000000 -0 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 0xfff8000000000000
maxpd(1 2 , 0 -2 ) = 1 2
maxpd(0 -2 , inf -inf ) = inf -2
maxpd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 2
maxpd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -0
maxpd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -0
maxpd(0x7ff8000000000000 -0 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -0
More test17 coverage
2022-03-31 09:00:25 +00:00
punpcklbw(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0xff 0x0 0x80 0x1 0x7f 0x5 0x0 0x15 0x1 0x20 0x2 0x80 0x3 0xff 0x81 0x0
punpcklwd(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0xffff 0x8000 0x8000 0x7fff 0x7fff 0xffff 0x0 0xffff
punpckldq(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0xffffffff 0x1 0x80000000 0x80000000
ppacksswb(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x80ff 0x7f 0x201 0x8003 0x7f80 0xffff 0x8050 0x80fe
More coverage for test17, and added NaN handling to 66 0F 7C opcode
2022-04-01 08:45:53 +00:00
pcmpgtb(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0x0 0x0 0xff 0x0 0x0 0xff 0xff 0x0 0x0 0x0 0xff 0xff 0x0 0x0 0x0 0xff
pcmpgtw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0xffff 0x0 0xffff 0xffff 0x0 0xffff 0xffff 0x0
pcmpgtd(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0x0 0x0 0xffffffff 0xffffffff
packuswb(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x0 0xff 0x201 0x3 0xff00 0x0 0x50 0x0
punpckhbw(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0xfe 0x8 0x84 0x7 0x72 0x81 0x52 0x6 0xa5 0xa 0x0 0xf 0xc0 0x10 0x32 0x1
punpckhwd(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x1 0x50 0x2 0x9000 0x3 0xfffe 0x8001 0x8001
punpckhdq(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0x7fffffff 0x5 0x0 0xfffffffe
More test17 coverage
2022-03-31 09:00:25 +00:00
ppackssdw(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0x8000ffff 0x7fff 0x80000001 0xfffe0005
More coverage for test17, and added NaN handling to 66 0F 7C opcode
2022-04-01 08:45:53 +00:00
punpcklqdq(0xffffffffffffffff 0x8000000000000000 , 0x1 0x8000000000000000 ) = 0xffffffffffffffff 0x1
punpckhqdq(0xffffffffffffffff 0x8000000000000000 , 0x1 0x8000000000000000 ) = 0x8000000000000000 0x8000000000000000
pshufd(0xffffffff 0x80000000 0x7fffffff 0x0 0) = 0xffffffff 0xffffffff 0xffffffff 0xffffffff
pshufd(0xffffffff 0x80000000 0x7fffffff 0x0 255) = 0x0 0x0 0x0 0x0
pshufd(0xffffffff 0x80000000 0x7fffffff 0x0 170) = 0x7fffffff 0x7fffffff 0x7fffffff 0x7fffffff
pshufd(0xffffffff 0x80000000 0x7fffffff 0x0 2) = 0x7fffffff 0xffffffff 0xffffffff 0xffffffff
psrlw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 0) = 0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001
psrlw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 255) = 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
psrlw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 170) = 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
psrlw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 2) = 0x3fff 0x2000 0x1fff 0x0 0x0 0x0 0x0 0x2000
psrld(0xffffffff 0x80000000 0x7fffffff 0x0 0) = 0xffffffff 0x80000000 0x7fffffff 0x0
psrld(0xffffffff 0x80000000 0x7fffffff 0x0 255) = 0x0 0x0 0x0 0x0
psrld(0xffffffff 0x80000000 0x7fffffff 0x0 170) = 0x0 0x0 0x0 0x0
psrld(0xffffffff 0x80000000 0x7fffffff 0x0 2) = 0x3fffffff 0x20000000 0x1fffffff 0x0
psrlq(0xffffffffffffffff 0x8000000000000000 0) = 0xffffffffffffffff 0x8000000000000000
psrlq(0xffffffffffffffff 0x8000000000000000 255) = 0x0 0x0
psrlq(0xffffffffffffffff 0x8000000000000000 170) = 0x0 0x0
psrlq(0xffffffffffffffff 0x8000000000000000 2) = 0x3fffffffffffffff 0x2000000000000000
psraw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 0) = 0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001
psraw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 255) = 0xffff 0xffff 0x0 0x0 0x0 0x0 0x0 0xffff
psraw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 170) = 0xffff 0xffff 0x0 0x0 0x0 0x0 0x0 0xffff
psraw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 2) = 0xffff 0xe000 0x1fff 0x0 0x0 0x0 0x0 0xe000
psrad(0xffffffff 0x80000000 0x7fffffff 0x0 0) = 0xffffffff 0x80000000 0x7fffffff 0x0
psrad(0xffffffff 0x80000000 0x7fffffff 0x0 255) = 0xffffffff 0xffffffff 0x0 0x0
psrad(0xffffffff 0x80000000 0x7fffffff 0x0 170) = 0xffffffff 0xffffffff 0x0 0x0
psrad(0xffffffff 0x80000000 0x7fffffff 0x0 2) = 0xffffffff 0xe0000000 0x1fffffff 0x0
psllw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 0) = 0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001
psllw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 255) = 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
psllw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 170) = 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
psllw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 2) = 0xfffc 0x0 0xfffc 0x0 0x4 0x8 0xc 0x4
pslld(0xffffffff 0x80000000 0x7fffffff 0x0 0) = 0xffffffff 0x80000000 0x7fffffff 0x0
pslld(0xffffffff 0x80000000 0x7fffffff 0x0 255) = 0x0 0x0 0x0 0x0
pslld(0xffffffff 0x80000000 0x7fffffff 0x0 170) = 0x0 0x0 0x0 0x0
pslld(0xffffffff 0x80000000 0x7fffffff 0x0 2) = 0xfffffffc 0x0 0xfffffffc 0x0
psllq(0xffffffffffffffff 0x8000000000000000 0) = 0xffffffffffffffff 0x8000000000000000
psllq(0xffffffffffffffff 0x8000000000000000 255) = 0x0 0x0
psllq(0xffffffffffffffff 0x8000000000000000 170) = 0x0 0x0
psllq(0xffffffffffffffff 0x8000000000000000 2) = 0xfffffffffffffffc 0x0
pcmpeqb(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
pcmpeqw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0xffff
pcmpeqd(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0x0 0xffffffff 0x0 0x0
haddpd(1 2 , 0 -2 ) = 3 -2
haddpd(0 -2 , inf -inf ) = -2 0xfff8000000000000
haddpd(1 2 , 0x7ff8000000000000 -0 ) = 3 0x7ff8000000000000
haddpd(0 -2 , 0x7ff8000000000000 -0 ) = -2 0x7ff8000000000000
haddpd(inf -inf , 0x7ff8000000000000 -0 ) = 0xfff8000000000000 0x7ff8000000000000
haddpd(0x7ff8000000000000 -0 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 0x7ff8000000000000
Even more test17 coverage
2022-04-01 09:27:27 +00:00
psrlw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
psrld(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0x0 0x0 0x0 0x0
psrlq(0xffffffffffffffff 0x8000000000000000 , 0x1 0x8000000000000000 ) = 0x7fffffffffffffff 0x4000000000000000
paddq(0xffffffffffffffff 0x8000000000000000 , 0x1 0x8000000000000000 ) = 0x0 0x0
pmullw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x8000 0x8000 0x8001 0x0 0x50 0x2000 0xfffa 0x1
psubusb(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0xff 0x7f 0x7a 0x0 0x0 0x0 0x0 0x81 0xf6 0x7d 0x0 0x4c 0x9b 0x0 0xb0 0x31
psubusw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x7fff 0x1 0x0 0x0 0x0 0x0 0x0 0x0
pminub(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0x0 0x1 0x5 0x0 0x1 0x2 0x3 0x0 0x8 0x7 0x72 0x6 0xa 0x0 0x10 0x1
pand(0x81030201007f80ff 0x32c000a5527284fe , 0xff802015050100 0x1100f0a06810708 ) = 0x3000000050000 0x2000408
paddusb(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0xff 0x81 0x84 0x15 0x21 0x82 0xff 0x81 0xff 0x8b 0xf3 0x58 0xaf 0xf 0xd0 0x33
paddusw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0xffff 0xffff 0xffff 0xffff 0x51 0x9002 0xffff 0xffff
pmaxub(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0xff 0x80 0x7f 0x15 0x20 0x80 0xff 0x81 0xfe 0x84 0x81 0x52 0xa5 0xf 0xc0 0x32
pandn(0x81030201007f80ff 0x32c000a5527284fe , 0xff802015050100 0x1100f0a06810708 ) = 0xfc802015000100 0x1100f0a04810300
pavgb(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0x80 0x41 0x42 0xb 0x11 0x41 0x81 0x41 0x83 0x46 0x7a 0x2c 0x58 0x8 0x68 0x1a
psraw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0xffff 0xffff 0x0 0x0 0x0 0x0 0x0 0xffff
psrad(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0xffffffff 0xffffffff 0x0 0x0
pavgb(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0xc000 0x8000 0xbfff 0x8000 0x29 0x4801 0x8001 0x8001
pmulhuw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x7fff 0x3fff 0x7ffe 0x0 0x0 0x1 0x2 0x4001
pmulhw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x0 0xc000 0xffff 0x0 0x0 0xffff 0xffff 0x3fff
psubsb(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0xff 0x80 0x7a 0xeb 0xe1 0x7f 0x4 0x81 0xf6 0x80 0x7f 0x4c 0x9b 0xf1 0xb0 0x31
psubsw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x7fff 0x8000 0x7fff 0x1 0xffb1 0x7002 0x5 0x0
pminsw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x8000 0x8000 0xffff 0xffff 0x1 0x9000 0xfffe 0x8001
por(0x81030201007f80ff 0x32c000a5527284fe , 0xff802015050100 0x1100f0a06810708 ) = 0x81ff8221157f81ff 0x33d00faf56f387fe
paddusb(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0xff 0x81 0x7f 0x15 0x21 0x82 0x2 0x81 0x6 0x8b 0xf3 0x58 0xaf 0xf 0xd0 0x33
paddusw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x8000 0xffff 0x7ffe 0xffff 0x51 0x9002 0x1 0x8000
pmaxsw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0xffff 0x7fff 0x7fff 0x0 0x50 0x2 0x3 0x8001
pxor(0x81030201007f80ff 0x32c000a5527284fe , 0xff802015050100 0x1100f0a06810708 ) = 0x81fc8221157a81ff 0x33d00faf54f383f6
psllw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0
pslld(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0x0 0x0 0x0 0x0
psllq(0xffffffffffffffff 0x8000000000000000 , 0x1 0x8000000000000000 ) = 0xfffffffffffffffe 0x0
pmuludq(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0xffffffff 0x0 0x7ffffffb 0x2
pmaddwd(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x0 0xc001 0x8001 0xffff 0x2050 0xffff 0xfffb 0x3ffe
psadbw(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0x27 0x4 0x0 0x0 0x0 0x0 0x0 0x0 0x59 0x3 0x0 0x0 0x0 0x0 0x0 0x0
psubb(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0xff 0x7f 0x7a 0xeb 0xe1 0x82 0x4 0x81 0xf6 0x7d 0xf1 0x4c 0x9b 0xf1 0xb0 0x31
psubw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x7fff 0x1 0x8000 0x1 0xffb1 0x7002 0x5 0x0
psubd(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0xfffffffe 0x0 0x7ffffffa 0x2
psubq(0xffffffffffffffff 0x8000000000000000 , 0x1 0x8000000000000000 ) = 0xfffffffffffffffe 0x0
paddb(0xff 0x80 0x7f 0x0 0x1 0x2 0x3 0x81 0xfe 0x84 0x72 0x52 0xa5 0x0 0xc0 0x32 , 0x0 0x1 0x5 0x15 0x20 0x80 0xff 0x0 0x8 0x7 0x81 0x6 0xa 0xf 0x10 0x1 ) = 0xff 0x81 0x84 0x15 0x21 0x82 0x2 0x81 0x6 0x8b 0xf3 0x58 0xaf 0xf 0xd0 0x33
paddw(0xffff 0x8000 0x7fff 0x0 0x1 0x2 0x3 0x8001 , 0x8000 0x7fff 0xffff 0xffff 0x50 0x9000 0xfffe 0x8001 ) = 0x7fff 0xffff 0x7ffe 0xffff 0x51 0x9002 0x1 0x2
paddd(0xffffffff 0x80000000 0x7fffffff 0x0 , 0x1 0x80000000 0x5 0xfffffffe ) = 0x0 0x0 0x80000004 0xfffffffe
Added more sse2 opcode to test17, and added nan handling to SQRTSD and MULSD ([DYNAREC] too)
2022-04-01 17:27:27 +00:00
pmovhlps(1 2 3 -4 , 0 -2 -10 0.5 ) = -10 0.5 3 -4
unpcklps(1 2 3 -4 , 0 -2 -10 0.5 ) = 1 0 2 -2
unpckhps(1 2 3 -4 , 0 -2 -10 0.5 ) = 3 -10 -4 0.5
pmovhps(1 2 3 -4 , 0 -2 -10 0.5 ) = 1 2 0 -2
psqrtps(1 2 3 -4 ) = 1 1.41421 1.73205 nan
psqrtps(0 -2 -10 0.5 ) = 0 nan nan 0.707107
psqrtps(inf -inf -inf 1 ) = inf nan nan 1
psqrtps(nan -0 nan inf ) = nan -0 nan inf
prcpps(nan -0 nan inf ) = nan -inf nan 0
andps(1 2 3 -4 , 0 -2 -10 0.5 ) = 0 2 2 0
andps(0 -2 -10 0.5 , inf -inf -inf 1 ) = 0 -2 -8 0.5
andps(1 2 3 -4 , nan -0 nan inf ) = 1 0 3 4
andps(0 -2 -10 0.5 , nan -0 nan inf ) = 0 -0 -8 0.5
andps(inf -inf -inf 1 , nan -0 nan inf ) = inf -0 -inf 1
andps(nan -0 nan inf , nan -0 nan inf ) = nan -0 nan inf
andnps(1 2 3 -4 , 0 -2 -10 0.5 ) = 0 -0 -2.93874e-38 0.5
andnps(0 -2 -10 0.5 , inf -inf -inf 1 ) = inf 1 0.25 1.17549e-38
andnps(1 2 3 -4 , nan -0 nan inf ) = 3 -0 -1 0.5
andnps(0 -2 -10 0.5 , nan -0 nan inf ) = nan 0 0.375 4
andnps(inf -inf -inf 1 , nan -0 nan inf ) = 5.87747e-39 0 5.87747e-39 2
andnps(nan -0 nan inf , nan -0 nan inf ) = 0 0 0 0
orps(1 2 3 -4 , 0 -2 -10 0.5 ) = 1 -2 -14 -inf
orps(0 -2 -10 0.5 , inf -inf -inf 1 ) = inf -inf nan 1
orps(1 2 3 -4 , nan -0 nan inf ) = nan -2 nan -inf
orps(0 -2 -10 0.5 , nan -0 nan inf ) = nan -2 nan inf
orps(inf -inf -inf 1 , nan -0 nan inf ) = nan -inf nan inf
orps(nan -0 nan inf , nan -0 nan inf ) = nan -0 nan inf
xorps(1 2 3 -4 , 0 -2 -10 0.5 ) = 1 -0 -4.11423e-38 -inf
xorps(0 -2 -10 0.5 , inf -inf -inf 1 ) = inf 1 0.3125 1.17549e-38
xorps(1 2 3 -4 , nan -0 nan inf ) = 3 -2 -1 -0.5
xorps(0 -2 -10 0.5 , nan -0 nan inf ) = nan 2 0.4375 4
xorps(inf -inf -inf 1 , nan -0 nan inf ) = 5.87747e-39 inf 5.87747e-39 2
xorps(nan -0 nan inf , nan -0 nan inf ) = 0 0 0 0
addps(1 2 3 -4 , 0 -2 -10 0.5 ) = 1 0 -7 -3.5
addps(0 -2 -10 0.5 , inf -inf -inf 1 ) = inf -inf -inf 1.5
addps(1 2 3 -4 , nan -0 nan inf ) = nan 2 nan inf
addps(0 -2 -10 0.5 , nan -0 nan inf ) = nan -2 nan inf
addps(inf -inf -inf 1 , nan -0 nan inf ) = nan -inf nan inf
addps(nan -0 nan inf , nan -0 nan inf ) = nan -0 nan inf
mulps(1 2 3 -4 , 0 -2 -10 0.5 ) = 0 -4 -30 -2
mulps(0 -2 -10 0.5 , inf -inf -inf 1 ) = nan inf inf 0.5
mulps(1 2 3 -4 , nan -0 nan inf ) = nan -0 nan -inf
mulps(0 -2 -10 0.5 , nan -0 nan inf ) = nan 0 nan inf
mulps(inf -inf -inf 1 , nan -0 nan inf ) = nan nan nan inf
mulps(nan -0 nan inf , nan -0 nan inf ) = nan 0 nan inf
subps(1 2 3 -4 , 0 -2 -10 0.5 ) = 1 4 13 -4.5
subps(0 -2 -10 0.5 , inf -inf -inf 1 ) = -inf inf inf -0.5
subps(1 2 3 -4 , nan -0 nan inf ) = nan 2 nan -inf
subps(0 -2 -10 0.5 , nan -0 nan inf ) = nan -2 nan -inf
subps(inf -inf -inf 1 , nan -0 nan inf ) = nan -inf nan -inf
subps(nan -0 nan inf , nan -0 nan inf ) = nan 0 nan nan
minps(1 2 3 -4 , 0 -2 -10 0.5 ) = 0 -2 -10 -4
minps(0 -2 -10 0.5 , inf -inf -inf 1 ) = 0 -inf -inf 0.5
minps(1 2 3 -4 , nan -0 nan inf ) = nan -0 nan -4
minps(0 -2 -10 0.5 , nan -0 nan inf ) = nan -2 nan 0.5
minps(inf -inf -inf 1 , nan -0 nan inf ) = nan -inf nan 1
minps(nan -0 nan inf , nan -0 nan inf ) = nan -0 nan inf
divps(1 2 3 -4 , 0 -2 -10 0.5 ) = inf -1 -0.3 -8
divps(0 -2 -10 0.5 , inf -inf -inf 1 ) = 0 0 0 0.5
divps(1 2 3 -4 , nan -0 nan inf ) = nan -inf nan -0
divps(0 -2 -10 0.5 , nan -0 nan inf ) = nan inf nan 0
divps(inf -inf -inf 1 , nan -0 nan inf ) = nan inf nan 0
divps(nan -0 nan inf , nan -0 nan inf ) = nan nan nan nan
maxps(1 2 3 -4 , 0 -2 -10 0.5 ) = 1 2 3 0.5
maxps(0 -2 -10 0.5 , inf -inf -inf 1 ) = inf -2 -10 1
maxps(1 2 3 -4 , nan -0 nan inf ) = nan 2 nan inf
maxps(0 -2 -10 0.5 , nan -0 nan inf ) = nan -0 nan inf
maxps(inf -inf -inf 1 , nan -0 nan inf ) = nan -0 nan inf
maxps(nan -0 nan inf , nan -0 nan inf ) = nan -0 nan inf
shufps(1 2 3 -4 , 0 -2 -10 0.5 , 0) = 1 1 0 0
shufps(0 -2 -10 0.5 , inf -inf -inf 1 , 0) = 0 0 inf inf
shufps(1 2 3 -4 , nan -0 nan inf , 0) = 1 1 nan nan
shufps(0 -2 -10 0.5 , nan -0 nan inf , 0) = 0 0 nan nan
shufps(inf -inf -inf 1 , nan -0 nan inf , 0) = inf inf nan nan
shufps(nan -0 nan inf , nan -0 nan inf , 0) = nan nan nan nan
shufps(1 2 3 -4 , 0 -2 -10 0.5 , 21) = 2 2 -2 0
shufps(0 -2 -10 0.5 , inf -inf -inf 1 , 21) = -2 -2 -inf inf
shufps(1 2 3 -4 , nan -0 nan inf , 21) = 2 2 -0 nan
shufps(0 -2 -10 0.5 , nan -0 nan inf , 21) = -2 -2 -0 nan
shufps(inf -inf -inf 1 , nan -0 nan inf , 21) = -inf -inf -0 nan
shufps(nan -0 nan inf , nan -0 nan inf , 21) = -0 -0 -0 nan
shufps(1 2 3 -4 , 0 -2 -10 0.5 , 255) = -4 -4 0.5 0.5
shufps(0 -2 -10 0.5 , inf -inf -inf 1 , 255) = 0.5 0.5 1 1
shufps(1 2 3 -4 , nan -0 nan inf , 255) = -4 -4 inf inf
shufps(0 -2 -10 0.5 , nan -0 nan inf , 255) = 0.5 0.5 inf inf
shufps(inf -inf -inf 1 , nan -0 nan inf , 255) = 1 1 inf inf
shufps(nan -0 nan inf , nan -0 nan inf , 255) = inf inf inf inf
shufps(1 2 3 -4 , 0 -2 -10 0.5 , 2) = 3 1 0 0
shufps(0 -2 -10 0.5 , inf -inf -inf 1 , 2) = -10 0 inf inf
shufps(1 2 3 -4 , nan -0 nan inf , 2) = 3 1 nan nan
shufps(0 -2 -10 0.5 , nan -0 nan inf , 2) = -10 0 nan nan
shufps(inf -inf -inf 1 , nan -0 nan inf , 2) = -inf inf nan nan
shufps(nan -0 nan inf , nan -0 nan inf , 2) = nan nan nan nan
sqrtsd(1 2 , 1 2 ) = 1 2
sqrtsd(1 2 , 0 -2 ) = 0 2
sqrtsd(1 2 , inf -inf ) = inf 2
sqrtsd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 2
More work on test17, and handling -NAN on divsd
2022-04-01 18:41:51 +00:00
sqrtsd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -2
sqrtsd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -inf
Added more sse2 opcode to test17, and added nan handling to SQRTSD and MULSD ([DYNAREC] too)
2022-04-01 17:27:27 +00:00
sqrtsd(1 2 , 2 1 ) = 1.41421 2
sqrtsd(1 2 , -2 0 ) = 0xfff8000000000000 2
sqrtsd(1 2 , -inf inf ) = 0xfff8000000000000 2
sqrtsd(1 2 , -0 0x7ff8000000000000 ) = -0 2
More work on test17, and handling -NAN on divsd
2022-04-01 18:41:51 +00:00
sqrtsd(0 -2 , -0 0x7ff8000000000000 ) = -0 -2
sqrtsd(0 -2 , -0 0x7ff8000000000000 ) = -0 -2
Added more sse2 opcode to test17, and added nan handling to SQRTSD and MULSD ([DYNAREC] too)
2022-04-01 17:27:27 +00:00
addsd(1 2 , 1 2 ) = 2 2
addsd(1 2 , 0 -2 ) = 1 2
addsd(1 2 , inf -inf ) = inf 2
addsd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 2
More work on test17, and handling -NAN on divsd
2022-04-01 18:41:51 +00:00
addsd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -2
addsd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -inf
Added more sse2 opcode to test17, and added nan handling to SQRTSD and MULSD ([DYNAREC] too)
2022-04-01 17:27:27 +00:00
addsd(1 2 , 2 1 ) = 3 2
addsd(1 2 , -2 0 ) = -1 2
addsd(1 2 , -inf inf ) = -inf 2
addsd(1 2 , -0 0x7ff8000000000000 ) = 1 2
More work on test17, and handling -NAN on divsd
2022-04-01 18:41:51 +00:00
addsd(0 -2 , -0 0x7ff8000000000000 ) = 0 -2
addsd(0 -2 , -0 0x7ff8000000000000 ) = 0 -2
Added more sse2 opcode to test17, and added nan handling to SQRTSD and MULSD ([DYNAREC] too)
2022-04-01 17:27:27 +00:00
mulsd(1 2 , 1 2 ) = 1 2
mulsd(1 2 , 0 -2 ) = 0 2
mulsd(1 2 , inf -inf ) = inf 2
mulsd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 2
More work on test17, and handling -NAN on divsd
2022-04-01 18:41:51 +00:00
mulsd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -2
mulsd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -inf
Added more sse2 opcode to test17, and added nan handling to SQRTSD and MULSD ([DYNAREC] too)
2022-04-01 17:27:27 +00:00
mulsd(1 2 , 2 1 ) = 2 2
mulsd(1 2 , -2 0 ) = -2 2
mulsd(1 2 , -inf inf ) = -inf 2
mulsd(1 2 , -0 0x7ff8000000000000 ) = -0 2
More work on test17, and handling -NAN on divsd
2022-04-01 18:41:51 +00:00
mulsd(0 -2 , -0 0x7ff8000000000000 ) = -0 -2
mulsd(0 -2 , -0 0x7ff8000000000000 ) = -0 -2
subsd(1 2 , 1 2 ) = 0 2
subsd(1 2 , 0 -2 ) = 1 2
subsd(1 2 , inf -inf ) = -inf 2
[TESTS] Disable compiler optimizations for test17 and some related fixes (#677) * [TESTS] Disable compiler optimizations for test17 * [INTERP] Fixed MAXSD/MINSD when both sources are 0 * [RV64_DYNAREC] Fixed F2 0F 5D MINSD opcode
2023-04-09 06:41:36 +00:00
subsd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 2
subsd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -2
Improved test17 and finetuned factorio profile to disable FASTROUND on Dynarec
2023-04-01 11:18:23 +00:00
subsd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -inf
More work on test17, and handling -NAN on divsd
2022-04-01 18:41:51 +00:00
subsd(1 2 , 2 1 ) = -1 2
subsd(1 2 , -2 0 ) = 3 2
subsd(1 2 , -inf inf ) = inf 2
subsd(1 2 , -0 0x7ff8000000000000 ) = 1 2
subsd(0 -2 , -0 0x7ff8000000000000 ) = 0 -2
subsd(0 -2 , -0 0x7ff8000000000000 ) = 0 -2
minsd(1 2 , 1 2 ) = 1 2
minsd(1 2 , 0 -2 ) = 0 2
minsd(1 2 , inf -inf ) = 1 2
minsd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 2
minsd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -2
minsd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -inf
minsd(1 2 , 2 1 ) = 1 2
minsd(1 2 , -2 0 ) = -2 2
minsd(1 2 , -inf inf ) = -inf 2
minsd(1 2 , -0 0x7ff8000000000000 ) = -0 2
minsd(0 -2 , -0 0x7ff8000000000000 ) = -0 -2
minsd(0 -2 , -0 0x7ff8000000000000 ) = -0 -2
divsd(1 2 , 1 2 ) = 1 2
divsd(1 2 , 0 -2 ) = inf 2
divsd(1 2 , inf -inf ) = 0 2
divsd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 2
divsd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -2
divsd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -inf
divsd(1 2 , 2 1 ) = 0.5 2
divsd(1 2 , -2 0 ) = -0.5 2
divsd(1 2 , -inf inf ) = -0 2
divsd(1 2 , -0 0x7ff8000000000000 ) = -inf 2
divsd(0 -2 , -0 0x7ff8000000000000 ) = 0xfff8000000000000 -2
divsd(0 -2 , -0 0x7ff8000000000000 ) = 0xfff8000000000000 -2
maxsd(1 2 , 1 2 ) = 1 2
maxsd(1 2 , 0 -2 ) = 1 2
maxsd(1 2 , inf -inf ) = inf 2
maxsd(1 2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 2
maxsd(0 -2 , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -2
maxsd(inf -inf , 0x7ff8000000000000 -0 ) = 0x7ff8000000000000 -inf
maxsd(1 2 , 2 1 ) = 2 2
maxsd(1 2 , -2 0 ) = 1 2
maxsd(1 2 , -inf inf ) = 1 2
maxsd(1 2 , -0 0x7ff8000000000000 ) = 1 2
[TESTS] Disable compiler optimizations for test17 and some related fixes (#677) * [TESTS] Disable compiler optimizations for test17 * [INTERP] Fixed MAXSD/MINSD when both sources are 0 * [RV64_DYNAREC] Fixed F2 0F 5D MINSD opcode
2023-04-09 06:41:36 +00:00
maxsd(0 -2 , -0 0x7ff8000000000000 ) = -0 -2
maxsd(0 -2 , -0 0x7ff8000000000000 ) = -0 -2
Improved test17 and finetuned factorio profile to disable FASTROUND on Dynarec
2023-04-01 11:18:23 +00:00
cvtps2pd(1 2 3 -4 ) = 0x1 0x2 0x3 0xfffffffc
cvtps2pd(0 -2 -10 0.5 ) = 0x0 0xfffffffe 0xfffffff6 0x0
cvtps2pd(inf -inf -inf 1 ) = 0x80000000 0x80000000 0x80000000 0x1
cvtps2pd(nan -0 nan inf ) = 0x80000000 0x0 0x80000000 0x80000000
[ARM64_DYNAREC] Added 66 0F 3A 40 opcode (with tests)
2023-11-06 14:36:43 +00:00
dpps(1 2 3 -4 , 0 -2 -10 0.5 , 255) = -36 -36 -36 -36
dpps(0 -2 -10 0.5 , inf -inf -inf 1 , 255) = nan nan nan nan
dpps(1 2 3 -4 , nan -0 nan inf , 255) = nan nan nan nan
dpps(0 -2 -10 0.5 , nan -0 nan inf , 255) = nan nan nan nan
dpps(inf -inf -inf 1 , nan -0 nan inf , 255) = nan nan nan nan
dpps(nan -0 nan inf , nan -0 nan inf , 255) = nan nan nan nan
dpps(1 2 3 -4 , 0 -2 -10 0.5 , 63) = -4 -4 -4 -4
dpps(0 -2 -10 0.5 , inf -inf -inf 1 , 63) = nan nan nan nan
dpps(1 2 3 -4 , nan -0 nan inf , 63) = nan nan nan nan
dpps(0 -2 -10 0.5 , nan -0 nan inf , 63) = nan nan nan nan
dpps(inf -inf -inf 1 , nan -0 nan inf , 63) = nan nan nan nan
dpps(nan -0 nan inf , nan -0 nan inf , 63) = nan nan nan nan
dpps(1 2 3 -4 , 0 -2 -10 0.5 , 243) = -36 -36 0 0
dpps(0 -2 -10 0.5 , inf -inf -inf 1 , 243) = nan nan 0 0
dpps(1 2 3 -4 , nan -0 nan inf , 243) = nan nan 0 0
dpps(0 -2 -10 0.5 , nan -0 nan inf , 243) = nan nan 0 0
dpps(inf -inf -inf 1 , nan -0 nan inf , 243) = nan nan 0 0
dpps(nan -0 nan inf , nan -0 nan inf , 243) = nan nan 0 0
dpps(1 2 3 -4 , 0 -2 -10 0.5 , 83) = -30 -30 0 0
dpps(0 -2 -10 0.5 , inf -inf -inf 1 , 83) = nan nan 0 0
dpps(1 2 3 -4 , nan -0 nan inf , 83) = nan nan 0 0
dpps(0 -2 -10 0.5 , nan -0 nan inf , 83) = nan nan 0 0
dpps(inf -inf -inf 1 , nan -0 nan inf , 83) = nan nan 0 0
dpps(nan -0 nan inf , nan -0 nan inf , 83) = nan nan 0 0
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