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[ARM64_DYNAREC] Fixed 66 0F D1/D2/D3 opcodes

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This commit is contained in:
ptitSeb 2023-04-07 12:56:35 +02:00
parent 5c2f62657f
commit 2417faa39b
1 changed files with 18 additions and 6 deletions
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24
src/dynarec/arm64/dynarec_arm64_660f.c
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@ -1991,8 +1991,12 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
GETGX(q0, 1);
GETEX(q1, 0, 0);
v0 = fpu_get_scratch(dyn);
VDUPQ_16(v0, q1, 0);
NEGQ_16(v0, v0); // neg, because SHR
v1 = fpu_get_scratch(dyn);
UQXTN_32(v0, q1);
MOVI_32(v1, 16);
UMIN_32(v0, v0, v1); // limit to 0 .. +16 values
NEG_32(v0, v0); // neg to do shr
VDUPQ_16(v0, v0, 0); // only the low 8bits will be used anyway
USHLQ_16(q0, q0, v0); // SHR x8
break;
case 0xD2:
@ -2001,8 +2005,12 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
GETGX(q0, 1);
GETEX(q1, 0, 0);
v0 = fpu_get_scratch(dyn);
VDUPQ_32(v0, q1, 0);
NEGQ_32(v0, v0); // neg, because SHR
v1 = fpu_get_scratch(dyn);
UQXTN_32(v0, q1);
MOVI_32(v1, 32);
UMIN_32(v0, v0, v1); // limit to 0 .. +32 values
NEG_32(v0, v0); // neg to do shr
VDUPQ_16(v0, v0, 0); // only the low 8bits will be used anyway
USHLQ_32(q0, q0, v0); // SHR x4
break;
case 0xD3:
@ -2011,8 +2019,12 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
GETGX(q0, 1);
GETEX(q1, 0, 0);
v0 = fpu_get_scratch(dyn);
NEG_64(v0, q1);
VMOVeD(v0, 1, v0, 0);
v1 = fpu_get_scratch(dyn);
UQXTN_32(v0, q1);
MOVI_32(v1, 64);
UMIN_32(v0, v0, v1); // limit to 0 .. +64 values
NEG_32(v0, v0); // neg to do shr
VDUPQ_16(v0, v0, 0); // only the low 8bits will be used anyway
USHLQ_64(q0, q0, v0);
break;
case 0xD4: