mirror of
https://github.com/ptitSeb/box64.git
synced 2024-11-27 00:30:32 +00:00
Fixes (#1659)
* Replaced some tabs with spaces * Fixed some signedness warnings * Added more debug info * Fixed an improper alignment * [WRAPPEDWAYLAND] Added return statements to wrappers * [EMU] [AVX] Fixed some issues * [ARM DYNAREC] Fixed some minor warnings * [ARM DYNAREC] Removed unused macro arguments * [EMU] Fixed a noisy warning * [ARM DYNAREC] Removed "empty body" warnings * [EMU] Fixed an opcode in dynarec, non-cosim builds * [LA64 DYNAREC] Minor warning fixes * [LA64 DYNAREC] Fixed empty body warnings * [LA64 DYNAREC] Added parenthesis around assignments in if statements * [LA64 DYNAREC] Fixed missing parenthesis in macro definitions * [RV64 DYNAREC] Fixed minor warnings * [RV64 DYNAREC] Fixed wrong/missing parentheses * [WRAPPER] Fixed the WaylandClient callback signatures
This commit is contained in:
parent
fdc7e9d1e4
commit
605d5a29c0
@ -488,13 +488,13 @@ HWCAP2_AFP
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return;
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return;
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}
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}
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if (la64_lbt = (cpucfg2 >> 18) & 0b1)
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if ((la64_lbt = (cpucfg2 >> 18) & 0b1))
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printf_log(LOG_INFO, " LBT_X86");
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printf_log(LOG_INFO, " LBT_X86");
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if (la64_lam_bh = (cpucfg2 >> 27) & 0b1)
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if ((la64_lam_bh = (cpucfg2 >> 27) & 0b1))
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printf_log(LOG_INFO, " LAM_BH");
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printf_log(LOG_INFO, " LAM_BH");
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if (la64_lamcas = (cpucfg2 >> 28) & 0b1)
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if ((la64_lamcas = (cpucfg2 >> 28) & 0b1))
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printf_log(LOG_INFO, " LAMCAS");
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printf_log(LOG_INFO, " LAMCAS");
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if (la64_scq = (cpucfg2 >> 30) & 0b1)
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if ((la64_scq = (cpucfg2 >> 30) & 0b1))
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printf_log(LOG_INFO, " SCQ");
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printf_log(LOG_INFO, " SCQ");
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}
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}
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#elif defined(RV64)
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#elif defined(RV64)
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@ -760,7 +760,7 @@ uintptr_t dynarec64_00(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin
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} else {
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} else {
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INST_NAME("BOUND Gd, Ed");
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INST_NAME("BOUND Gd, Ed");
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nextop = F8;
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nextop = F8;
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FAKEED(0);
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FAKEED;
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}
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}
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break;
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break;
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case 0x63:
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case 0x63:
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@ -2515,7 +2515,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
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}
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}
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MOV32w(x4, 1);
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MOV32w(x4, 1);
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BFIxw(ed, x4, u8, 1);
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BFIxw(ed, x4, u8, 1);
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EWBACK(x1);
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EWBACK;
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break;
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break;
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case 6:
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case 6:
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INST_NAME("BTR Ew, Ib");
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INST_NAME("BTR Ew, Ib");
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@ -2528,7 +2528,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
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BFXILxw(xFlags, ed, u8, 1); // inject 1 bit from u8 to F_CF (i.e. pos 0)
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BFXILxw(xFlags, ed, u8, 1); // inject 1 bit from u8 to F_CF (i.e. pos 0)
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}
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}
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BFCxw(ed, u8, 1);
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BFCxw(ed, u8, 1);
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EWBACK(x1);
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EWBACK;
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break;
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break;
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case 7:
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case 7:
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INST_NAME("BTC Ew, Ib");
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INST_NAME("BTC Ew, Ib");
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@ -2542,7 +2542,7 @@ uintptr_t dynarec64_660F(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int n
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}
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}
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MOV32w(x4, 1);
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MOV32w(x4, 1);
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EORxw_REG_LSL(ed, ed, x4, u8);
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EORxw_REG_LSL(ed, ed, x4, u8);
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EWBACK(x1);
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EWBACK;
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break;
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break;
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default:
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default:
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DEFAULT;
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DEFAULT;
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@ -998,7 +998,7 @@ void x87_do_push_empty(dynarec_arm_t* dyn, int ninst, int s1)
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dyn->abort = 1;
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dyn->abort = 1;
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}
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}
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}
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}
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void static internal_x87_dopop(dynarec_arm_t* dyn)
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static void internal_x87_dopop(dynarec_arm_t* dyn)
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{
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{
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for(int i=0; i<8; ++i)
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for(int i=0; i<8; ++i)
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if(dyn->n.x87cache[i]!=-1) {
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if(dyn->n.x87cache[i]!=-1) {
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@ -1009,7 +1009,7 @@ void static internal_x87_dopop(dynarec_arm_t* dyn)
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}
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}
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}
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}
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}
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}
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int static internal_x87_dofree(dynarec_arm_t* dyn)
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static int internal_x87_dofree(dynarec_arm_t* dyn)
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{
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{
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if(dyn->n.tags&0b11) {
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if(dyn->n.tags&0b11) {
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MESSAGE(LOG_DUMP, "\t--------x87 FREED ST0, poping 1 more\n");
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MESSAGE(LOG_DUMP, "\t--------x87 FREED ST0, poping 1 more\n");
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@ -1035,7 +1035,7 @@
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#define SET_DFOK() dyn->f.dfnone = 1; dyn->f.dfnone_here=1
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#define SET_DFOK() dyn->f.dfnone = 1; dyn->f.dfnone_here=1
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#ifndef MAYSETFLAGS
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#ifndef MAYSETFLAGS
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#define MAYSETFLAGS()
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#define MAYSETFLAGS() do {} while (0)
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#endif
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#endif
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#ifndef READFLAGS
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#ifndef READFLAGS
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@ -5,7 +5,7 @@
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dyn->insts[ninst].x64.addr = addr; \
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dyn->insts[ninst].x64.addr = addr; \
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if(ninst) dyn->insts[ninst-1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst-1].x64.addr
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if(ninst) dyn->insts[ninst-1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst-1].x64.addr
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#define MESSAGE(A, ...)
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#define MESSAGE(A, ...) do {} while (0)
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#define MAYSETFLAGS() dyn->insts[ninst].x64.may_set = 1
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#define MAYSETFLAGS() dyn->insts[ninst].x64.may_set = 1
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#define READFLAGS(A) \
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#define READFLAGS(A) \
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dyn->insts[ninst].x64.use_flags = A; dyn->f.dfnone = 1;\
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dyn->insts[ninst].x64.use_flags = A; dyn->f.dfnone = 1;\
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@ -1,7 +1,7 @@
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#define INIT
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#define INIT
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#define FINI
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#define FINI
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#define MESSAGE(A, ...)
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#define MESSAGE(A, ...) do {} while (0)
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#define EMIT(A)
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#define EMIT(A) do {} while (0)
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#define NEW_INST \
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#define NEW_INST \
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dyn->insts[ninst].f_entry = dyn->f; \
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dyn->insts[ninst].f_entry = dyn->f; \
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dyn->n.combined1 = dyn->n.combined2 = 0;\
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dyn->n.combined1 = dyn->n.combined2 = 0;\
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@ -5,7 +5,7 @@
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dyn->insts_size += 1+((dyn->insts[ninst].x64.size>(dyn->insts[ninst].size/4))?dyn->insts[ninst].x64.size:(dyn->insts[ninst].size/4))/15; \
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dyn->insts_size += 1+((dyn->insts[ninst].x64.size>(dyn->insts[ninst].size/4))?dyn->insts[ninst].x64.size:(dyn->insts[ninst].size/4))/15; \
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}
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}
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#define MESSAGE(A, ...)
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#define MESSAGE(A, ...) do {} while (0)
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#define EMIT(A) do{dyn->insts[ninst].size+=4; dyn->native_size+=4;}while(0)
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#define EMIT(A) do{dyn->insts[ninst].size+=4; dyn->native_size+=4;}while(0)
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#define NEW_INST \
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#define NEW_INST \
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if(ninst) { \
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if(ninst) { \
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@ -48,7 +48,7 @@ dynablock_t* InvalidDynablock(dynablock_t* db, int need_lock)
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mutex_lock(&my_context->mutex_dyndump);
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mutex_lock(&my_context->mutex_dyndump);
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db->done = 0;
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db->done = 0;
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db->gone = 1;
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db->gone = 1;
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int db_size = db->x64_size;
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uintptr_t db_size = db->x64_size;
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if(db_size && my_context) {
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if(db_size && my_context) {
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uint32_t n = rb_get(my_context->db_sizes, db_size);
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uint32_t n = rb_get(my_context->db_sizes, db_size);
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if(n>1)
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if(n>1)
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@ -94,7 +94,7 @@ void FreeDynablock(dynablock_t* db, int need_lock)
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dynarec_log(LOG_DEBUG, " -- FreeDyrecMap(%p, %d)\n", db->actual_block, db->size);
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dynarec_log(LOG_DEBUG, " -- FreeDyrecMap(%p, %d)\n", db->actual_block, db->size);
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db->done = 0;
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db->done = 0;
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db->gone = 1;
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db->gone = 1;
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int db_size = db->x64_size;
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uintptr_t db_size = db->x64_size;
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if(db_size && my_context) {
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if(db_size && my_context) {
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uint32_t n = rb_get(my_context->db_sizes, db_size);
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uint32_t n = rb_get(my_context->db_sizes, db_size);
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if(n>1)
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if(n>1)
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@ -264,7 +264,7 @@ uintptr_t native_pass(dynarec_native_t* dyn, uintptr_t addr, int alternate, int
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reset_n = get_first_jump(dyn, next);
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reset_n = get_first_jump(dyn, next);
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}
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}
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if(box64_dynarec_dump) dynarec_log(LOG_NONE, "Extend block %p, %s%p -> %p (ninst=%d, jump from %d)\n", dyn, dyn->insts[ninst].x64.has_callret?"(opt. call) ":"", (void*)addr, (void*)next, ninst+1, dyn->insts[ninst].x64.has_callret?ninst:reset_n);
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if(box64_dynarec_dump) dynarec_log(LOG_NONE, "Extend block %p, %s%p -> %p (ninst=%d, jump from %d)\n", dyn, dyn->insts[ninst].x64.has_callret?"(opt. call) ":"", (void*)addr, (void*)next, ninst+1, dyn->insts[ninst].x64.has_callret?ninst:reset_n);
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} else if(next && (next-addr)<box64_dynarec_forward && (getProtection(next)&PROT_READ)/*box64_dynarec_bigblock>=stopblock*/) {
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} else if(next && (int)(next-addr)<box64_dynarec_forward && (getProtection(next)&PROT_READ)/*box64_dynarec_bigblock>=stopblock*/) {
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if(!((box64_dynarec_bigblock<stopblock) && !isJumpTableDefault64((void*)next))) {
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if(!((box64_dynarec_bigblock<stopblock) && !isJumpTableDefault64((void*)next))) {
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if(dyn->forward) {
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if(dyn->forward) {
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if(next<dyn->forward_to)
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if(next<dyn->forward_to)
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@ -144,7 +144,9 @@ void emit_add32c(dynarec_la64_t* dyn, int ninst, rex_t rex, int s1, int64_t c, i
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IFX(X_PEND | X_AF | X_CF | X_OF)
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IFX(X_PEND | X_AF | X_CF | X_OF)
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{
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{
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MOV64xw(s2, c);
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MOV64xw(s2, c);
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} else if (la64_lbt) MOV64xw(s2, c);
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} else if (la64_lbt) {
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MOV64xw(s2, c);
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}
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IFX(X_PEND)
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IFX(X_PEND)
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{
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{
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SDxw(s1, xEmu, offsetof(x64emu_t, op1));
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SDxw(s1, xEmu, offsetof(x64emu_t, op1));
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@ -353,12 +353,14 @@ uintptr_t dynarec64_F0(dynarec_la64_t* dyn, uintptr_t addr, uintptr_t ip, int ni
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emit_or32c(dyn, ninst, rex, ed, i64, x3, x4);
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emit_or32c(dyn, ninst, rex, ed, i64, x3, x4);
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} else {
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} else {
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addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode == 0x81) ? 4 : 1);
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addr = geted(dyn, addr, ninst, nextop, &wback, x2, x1, &fixedaddress, rex, LOCK_LOCK, 0, (opcode == 0x81) ? 4 : 1);
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if (opcode == 0x81)
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if (opcode == 0x81) {
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i64 = F32S;
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i64 = F32S;
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else
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} else {
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i64 = F8S;
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i64 = F8S;
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if (i64 <= -2048 || i64 > 2048)
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}
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if (i64 <= -2048 || i64 > 2048) {
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MOV64xw(x3, i64);
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MOV64xw(x3, i64);
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}
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MARKLOCK;
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MARKLOCK;
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LLxw(x1, wback, 0);
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LLxw(x1, wback, 0);
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if (i64 >= -2048 && i64 < 2048) {
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if (i64 >= -2048 && i64 < 2048) {
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@ -621,7 +621,7 @@
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ANDI(scratch1, scratch2, 0x80); \
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ANDI(scratch1, scratch2, 0x80); \
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} else { \
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} else { \
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SRLI_D(scratch1, scratch2, (width)-1); \
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SRLI_D(scratch1, scratch2, (width)-1); \
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if (width != 64) ANDI(scratch1, scratch1, 1); \
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if ((width) != 64) ANDI(scratch1, scratch1, 1); \
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} \
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} \
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BEQZ(scratch1, 8); \
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BEQZ(scratch1, 8); \
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ORI(xFlags, xFlags, 1 << F_CF); \
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ORI(xFlags, xFlags, 1 << F_CF); \
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@ -639,7 +639,7 @@
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}
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}
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#ifndef MAYSETFLAGS
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#ifndef MAYSETFLAGS
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#define MAYSETFLAGS()
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#define MAYSETFLAGS() do {} while (0)
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#endif
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#endif
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#ifndef READFLAGS
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#ifndef READFLAGS
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@ -4,7 +4,7 @@
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dyn->insts[ninst].x64.addr = addr; \
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dyn->insts[ninst].x64.addr = addr; \
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if (ninst) dyn->insts[ninst - 1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst - 1].x64.addr
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if (ninst) dyn->insts[ninst - 1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst - 1].x64.addr
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#define MESSAGE(A, ...)
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#define MESSAGE(A, ...) do {} while (0)
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#define MAYSETFLAGS() dyn->insts[ninst].x64.may_set = 1
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#define MAYSETFLAGS() dyn->insts[ninst].x64.may_set = 1
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#define READFLAGS(A) \
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#define READFLAGS(A) \
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dyn->insts[ninst].x64.use_flags = A; \
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dyn->insts[ninst].x64.use_flags = A; \
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@ -1,7 +1,7 @@
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#define INIT
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#define INIT
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#define FINI
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#define FINI
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#define MESSAGE(A, ...)
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#define MESSAGE(A, ...) do {} while (0)
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#define EMIT(A)
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#define EMIT(A) do {} while (0)
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#define NEW_INST \
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#define NEW_INST \
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dyn->insts[ninst].f_entry = dyn->f; \
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dyn->insts[ninst].f_entry = dyn->f; \
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dyn->lsx.combined1 = dyn->lsx.combined2 = 0; \
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dyn->lsx.combined1 = dyn->lsx.combined2 = 0; \
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@ -5,7 +5,7 @@
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dyn->insts_size += 1 + ((dyn->insts[ninst].x64.size > (dyn->insts[ninst].size / 4)) ? dyn->insts[ninst].x64.size : (dyn->insts[ninst].size / 4)) / 15; \
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dyn->insts_size += 1 + ((dyn->insts[ninst].x64.size > (dyn->insts[ninst].size / 4)) ? dyn->insts[ninst].x64.size : (dyn->insts[ninst].size / 4)) / 15; \
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}
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}
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#define MESSAGE(A, ...)
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#define MESSAGE(A, ...) do {} while (0)
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#define EMIT(A) \
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#define EMIT(A) \
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do { \
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do { \
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dyn->insts[ninst].size += 4; \
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dyn->insts[ninst].size += 4; \
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@ -482,19 +482,19 @@ f24-f31 fs0-fs7 Static registers Callee
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// bstr32[msbw:lsbw] = GR[rj][msbw-lsbw:0]
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// bstr32[msbw:lsbw] = GR[rj][msbw-lsbw:0]
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// bstr32[lsbw-1:0] = GR[rd][lsbw-1:0]
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// bstr32[lsbw-1:0] = GR[rd][lsbw-1:0]
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// GR[rd] = SignExtend(bstr32[31:0], GRLEN)
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// GR[rd] = SignExtend(bstr32[31:0], GRLEN)
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#define BSTRINS_W(rd, rj, msbw5, lsbw5) EMIT(type_2RI12(0b0000000001, 0b100000000000 | (msbw5 & 0x1F) << 6 | (lsbw5 & 0x1F), rj, rd))
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#define BSTRINS_W(rd, rj, msbw5, lsbw5) EMIT(type_2RI12(0b0000000001, 0b100000000000 | ((msbw5) & 0x1F) << 6 | ((lsbw5) & 0x1F), rj, rd))
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// GR[rd][63:msbd+1] = GR[rd][63:msbd+1]
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// GR[rd][63:msbd+1] = GR[rd][63:msbd+1]
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// GR[rd][msbd:lsbd] = GR[rj][msbd-lsbd:0]
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// GR[rd][msbd:lsbd] = GR[rj][msbd-lsbd:0]
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// GR[rd][lsbd-1:0] = GR[rd][lsbd-1:0]
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// GR[rd][lsbd-1:0] = GR[rd][lsbd-1:0]
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#define BSTRINS_D(rd, rj, msbd6, lsbd6) EMIT(type_2RI12(0b0000000010, (msbd6 & 0x3F) << 6 | (lsbd6 & 0x3F), rj, rd))
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#define BSTRINS_D(rd, rj, msbd6, lsbd6) EMIT(type_2RI12(0b0000000010, ((msbd6) & 0x3F) << 6 | ((lsbd6) & 0x3F), rj, rd))
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// bstr32[31:0] = ZeroExtend(GR[rj][msbw:lsbw], 32)
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// bstr32[31:0] = ZeroExtend(GR[rj][msbw:lsbw], 32)
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// GR[rd] = SignExtend(bstr32[31:0], GRLEN)
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// GR[rd] = SignExtend(bstr32[31:0], GRLEN)
|
||||||
#define BSTRPICK_W(rd, rj, msbw5, lsbw5) EMIT(type_2RI12(0b0000000001, 0b100000100000 | (msbw5 & 0x1F) << 6 | (lsbw5 & 0x1F), rj, rd))
|
#define BSTRPICK_W(rd, rj, msbw5, lsbw5) EMIT(type_2RI12(0b0000000001, 0b100000100000 | ((msbw5) & 0x1F) << 6 | ((lsbw5) & 0x1F), rj, rd))
|
||||||
|
|
||||||
// GR[rd] = ZeroExtend(GR[rj][msbd:lsbd], 64)
|
// GR[rd] = ZeroExtend(GR[rj][msbd:lsbd], 64)
|
||||||
#define BSTRPICK_D(rd, rj, msbd6, lsbd6) EMIT(type_2RI12(0b0000000011, (msbd6 & 0x3F) << 6 | (lsbd6 & 0x3F), rj, rd))
|
#define BSTRPICK_D(rd, rj, msbd6, lsbd6) EMIT(type_2RI12(0b0000000011, ((msbd6) & 0x3F) << 6 | ((lsbd6) & 0x3F), rj, rd))
|
||||||
|
|
||||||
// ZERO the upper part
|
// ZERO the upper part
|
||||||
#define ZEROUP(rd) BSTRINS_D(rd, xZR, 63, 32);
|
#define ZEROUP(rd) BSTRINS_D(rd, xZR, 63, 32);
|
||||||
|
@ -12,7 +12,7 @@ static const char* Vt[] = { "vra0", "vra1", "vra2", "vra3", "vra4", "vra5", "vra
|
|||||||
|
|
||||||
typedef struct la64_print_s {
|
typedef struct la64_print_s {
|
||||||
int d, j, k, a;
|
int d, j, k, a;
|
||||||
int i, u;
|
uint64_t i, u;
|
||||||
} la64_print_t;
|
} la64_print_t;
|
||||||
|
|
||||||
int isMask(uint32_t opcode, const char* mask, la64_print_t *a)
|
int isMask(uint32_t opcode, const char* mask, la64_print_t *a)
|
||||||
@ -44,7 +44,7 @@ int isMask(uint32_t opcode, const char* mask, la64_print_t *a)
|
|||||||
return 1;
|
return 1;
|
||||||
}
|
}
|
||||||
|
|
||||||
int64_t signExtend(uint32_t val, int sz)
|
int64_t signExtend(uint64_t val, int sz)
|
||||||
{
|
{
|
||||||
int64_t ret = val;
|
int64_t ret = val;
|
||||||
if((val>>(sz-1))&1)
|
if((val>>(sz-1))&1)
|
||||||
@ -80,39 +80,39 @@ const char* la64_print(uint32_t opcode, uintptr_t addr)
|
|||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000001010iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000001010iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "ADDI.W", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "ADDI.W", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000001011iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000001011iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "ADDI.D", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "ADDI.D", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000100iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "000100iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "ADDU16I.D", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "ADDU16I.D", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000000010iikkkkkjjjjjddddd", &a)) {
|
if (isMask(opcode, "000000000000010iikkkkkjjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %s, %d", "ALSL.W", Xt[Rd], Xt[Rj], Xt[Rk], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %s, %lu", "ALSL.W", Xt[Rd], Xt[Rj], Xt[Rk], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000000011iikkkkkjjjjjddddd", &a)) {
|
if (isMask(opcode, "000000000000011iikkkkkjjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %s, %d", "ALSL.WU", Xt[Rd], Xt[Rj], Xt[Rk], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %s, %lu", "ALSL.WU", Xt[Rd], Xt[Rj], Xt[Rk], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000010110iikkkkkjjjjjddddd", &a)) {
|
if (isMask(opcode, "000000000010110iikkkkkjjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %s, %d", "ALSL.D", Xt[Rd], Xt[Rj], Xt[Rk], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %s, %lu", "ALSL.D", Xt[Rd], Xt[Rj], Xt[Rk], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0001010iiiiiiiiiiiiiiiiiiiiddddd", &a)) {
|
if (isMask(opcode, "0001010iiiiiiiiiiiiiiiiiiiiddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, 0x%x", "LU12I.W", Xt[Rd], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, 0x%lx", "LU12I.W", Xt[Rd], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0001011iiiiiiiiiiiiiiiiiiiiddddd", &a)) {
|
if (isMask(opcode, "0001011iiiiiiiiiiiiiiiiiiiiddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "LU32I.D", Xt[Rd], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "LU32I.D", Xt[Rd], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000001100iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000001100iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "LU52I.D", Xt[Rd], Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu", "LU52I.D", Xt[Rd], Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000000100100kkkkkjjjjjddddd", &a)) {
|
if (isMask(opcode, "00000000000100100kkkkkjjjjjddddd", &a)) {
|
||||||
@ -124,47 +124,47 @@ const char* la64_print(uint32_t opcode, uintptr_t addr)
|
|||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000001000iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000001000iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "SLTI", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "SLTI", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000001001iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000001001iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u", "SLTI", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "SLTI", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0001100iiiiiiiiiiiiiiiiiiiiddddd", &a)) {
|
if (isMask(opcode, "0001100iiiiiiiiiiiiiiiiiiiiddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, 0x%lx", "PCADDI", Xt[Rd], signExtend(imm << 2, 22));
|
snprintf(buff, sizeof(buff), "%-15s %s, 0x%lx", "PCADDI", Xt[Rd], (uint64_t)signExtend(imm << 2, 22));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0001101iiiiiiiiiiiiiiiiiiiiddddd", &a)) {
|
if (isMask(opcode, "0001101iiiiiiiiiiiiiiiiiiiiddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, 0x%lx", "PCALAU12I", Xt[Rd], signExtend(imm << 12, 32));
|
snprintf(buff, sizeof(buff), "%-15s %s, 0x%lx", "PCALAU12I", Xt[Rd], (uint64_t)signExtend(imm << 12, 32));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0001110iiiiiiiiiiiiiiiiiiiiddddd", &a)) {
|
if (isMask(opcode, "0001110iiiiiiiiiiiiiiiiiiiiddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, 0x%lx", "PCADDU12I", Xt[Rd], signExtend(imm << 12, 32));
|
snprintf(buff, sizeof(buff), "%-15s %s, 0x%lx", "PCADDU12I", Xt[Rd], (uint64_t)signExtend(imm << 12, 32));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0001111iiiiiiiiiiiiiiiiiiiiddddd", &a)) {
|
if (isMask(opcode, "0001111iiiiiiiiiiiiiiiiiiiiddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, 0x%lx", "PCADDU18I", Xt[Rd], signExtend(imm << 18, 38));
|
snprintf(buff, sizeof(buff), "%-15s %s, 0x%lx", "PCADDU18I", Xt[Rd], (uint64_t)signExtend(imm << 18, 38));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00100000iiiiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "00100000iiiiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "LL.W", Xt[Rd], Xt[Rj], signExtend(imm << 2, 16));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "LL.W", Xt[Rd], Xt[Rj], signExtend(imm << 2, 16));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00100001iiiiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "00100001iiiiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "SC.W", Xt[Rd], Xt[Rj], signExtend(imm << 2, 16));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "SC.W", Xt[Rd], Xt[Rj], signExtend(imm << 2, 16));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00100010iiiiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "00100010iiiiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "LL.D", Xt[Rd], Xt[Rj], signExtend(imm << 2, 16));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "LL.D", Xt[Rd], Xt[Rj], signExtend(imm << 2, 16));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00100011iiiiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "00100011iiiiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "SC.D", Xt[Rd], Xt[Rj], signExtend(imm << 2, 16));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "SC.D", Xt[Rd], Xt[Rj], signExtend(imm << 2, 16));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00111000011100100iiiiiiiiiiiiiii", &a)) {
|
if (isMask(opcode, "00111000011100100iiiiiiiiiiiiiii", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %d", "DBAR", imm);
|
snprintf(buff, sizeof(buff), "%-15s %lu", "DBAR", imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000000101001kkkkkjjjjjddddd", &a)) {
|
if (isMask(opcode, "00000000000101001kkkkkjjjjjddddd", &a)) {
|
||||||
@ -196,15 +196,15 @@ const char* la64_print(uint32_t opcode, uintptr_t addr)
|
|||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000001101iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000001101iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x", "ANDI", Xt[Rd], Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%lx", "ANDI", Xt[Rd], Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000001110iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000001110iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x", "ORI", Xt[Rd], Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%lx", "ORI", Xt[Rd], Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000001111iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000001111iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x", "XORI", Xt[Rd], Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%lx", "XORI", Xt[Rd], Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000000101110kkkkkjjjjjddddd", &a)) {
|
if (isMask(opcode, "00000000000101110kkkkkjjjjjddddd", &a)) {
|
||||||
@ -240,35 +240,35 @@ const char* la64_print(uint32_t opcode, uintptr_t addr)
|
|||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001000001iiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000000001000001iiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u", "SLLI.D", Xt[Rd], Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu", "SLLI.D", Xt[Rd], Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001000101iiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000000001000101iiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u", "SRLI.D", Xt[Rd], Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu", "SRLI.D", Xt[Rd], Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001001001iiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000000001001001iiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u", "SRAI.D", Xt[Rd], Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu", "SRAI.D", Xt[Rd], Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001001101iiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000000001001101iiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u", "ROTRI.D", Xt[Rd], Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu", "ROTRI.D", Xt[Rd], Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010000001iiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "00000000010000001iiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u", "SLLI.W", Xt[Rd], Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu", "SLLI.W", Xt[Rd], Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010001001iiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "00000000010001001iiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u", "SRLI.W", Xt[Rd], Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu", "SRLI.W", Xt[Rd], Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010010001iiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "00000000010010001iiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u", "SRAI.W", Xt[Rd], Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu", "SRAI.W", Xt[Rd], Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010011001iiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "00000000010011001iiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u", "ROTRI.W", Xt[Rd], Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu", "ROTRI.W", Xt[Rd], Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000000111000kkkkkjjjjjddddd", &a)) {
|
if (isMask(opcode, "00000000000111000kkkkkjjjjjddddd", &a)) {
|
||||||
@ -336,19 +336,19 @@ const char* la64_print(uint32_t opcode, uintptr_t addr)
|
|||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000011uuuuu0iiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "00000000011uuuuu0iiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u, %u", "BSTRINS.W", Xt[Rd], Xt[Rj], imm_up, imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu, %lu", "BSTRINS.W", Xt[Rd], Xt[Rj], imm_up, imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000010uuuuuuiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000000010uuuuuuiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u, %u", "BSTRINS.D", Xt[Rd], Xt[Rj], imm_up, imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu, %lu", "BSTRINS.D", Xt[Rd], Xt[Rj], imm_up, imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000011uuuuu1iiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "00000000011uuuuu1iiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u, %u", "BSTRPICK.W", Xt[Rd], Xt[Rj], imm_up, imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu, %lu", "BSTRPICK.W", Xt[Rd], Xt[Rj], imm_up, imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000011uuuuuuiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0000000011uuuuuuiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %u, %u", "BSTRPICK.D", Xt[Rd], Xt[Rj], imm_up, imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %lu, %lu", "BSTRPICK.D", Xt[Rd], Xt[Rj], imm_up, imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000000000000000100jjjjjddddd", &a)) {
|
if (isMask(opcode, "0000000000000000000100jjjjjddddd", &a)) {
|
||||||
@ -432,35 +432,35 @@ const char* la64_print(uint32_t opcode, uintptr_t addr)
|
|||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "010110iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "010110iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "BEQ", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "BEQ", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "010111iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "010111iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "BNE", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "BNE", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "011000iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "011000iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "BLT", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "BLT", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "011001iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "011001iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "BGE", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "BGE", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "011010iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "011010iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "BLTU", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "BLTU", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "011011iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "011011iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "BGEU", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "BGEU", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "010000iiiiiiiiiiiiiiiijjjjjuuuuu", &a)) {
|
if (isMask(opcode, "010000iiiiiiiiiiiiiiiijjjjjuuuuu", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "BEQZ", Xt[Rj], signExtend(imm + (imm_up << 16) << 2, 23));
|
snprintf(buff, sizeof(buff), "%-15s %s, %ld", "BEQZ", Xt[Rj], signExtend((imm + (imm_up << 16)) << 2, 23));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "010001iiiiiiiiiiiiiiiijjjjjuuuuu", &a)) {
|
if (isMask(opcode, "010001iiiiiiiiiiiiiiiijjjjjuuuuu", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "BNEZ", Xt[Rj], signExtend(imm + (imm_up << 16) << 2, 23));
|
snprintf(buff, sizeof(buff), "%-15s %s, %ld", "BNEZ", Xt[Rj], signExtend((imm + (imm_up << 16)) << 2, 23));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0100110000000000000000jjjjj00000", &a)) {
|
if (isMask(opcode, "0100110000000000000000jjjjj00000", &a)) {
|
||||||
@ -468,55 +468,55 @@ const char* la64_print(uint32_t opcode, uintptr_t addr)
|
|||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "010011iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "010011iiiiiiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "JIRL", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "JIRL", Xt[Rd], Xt[Rj], signExtend(imm << 2, 18));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "010100iiiiiiiiiiiiiiiiiiiiiiiiii", &a)) {
|
if (isMask(opcode, "010100iiiiiiiiiiiiiiiiiiiiiiiiii", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s 0x%x", "B", (((imm & 0x3FF) << 16) | ((uint32_t)imm >> 10)) << 6 >> 4);
|
snprintf(buff, sizeof(buff), "%-15s 0x%lx", "B", (((imm & 0x3FF) << 16) | (imm >> 10)) << 6 >> 4);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010100000iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010100000iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "LD.B", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "LD.B", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010100001iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010100001iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "LD.H", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "LD.H", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010100010iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010100010iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "LD.W", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "LD.W", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010100011iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010100011iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "LD.D", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "LD.D", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010101000iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010101000iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "LD.BU", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "LD.BU", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010101001iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010101001iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "LD.HU", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "LD.HU", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010101010iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010101010iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "LD.WU", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "LD.WU", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010100100iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010100100iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "ST.B", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "ST.B", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010100101iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010100101iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "ST.H", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "ST.H", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010100110iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010100110iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "ST.W", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "ST.W", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010100111iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010100111iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "ST.D", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "ST.D", Xt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00111000000000000kkkkkjjjjjddddd", &a)) {
|
if (isMask(opcode, "00111000000000000kkkkkjjjjjddddd", &a)) {
|
||||||
@ -564,19 +564,19 @@ const char* la64_print(uint32_t opcode, uintptr_t addr)
|
|||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010101110iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010101110iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "FLD.D", Ft[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "FLD.D", Ft[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010101100iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010101100iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "FLD.S", Ft[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "FLD.S", Ft[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010101111iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010101111iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "FST.D", Ft[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "FST.D", Ft[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010101101iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010101101iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "FST.S", Ft[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "FST.S", Ft[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000001000000001kkkkkjjjjjddddd", &a)) {
|
if (isMask(opcode, "00000001000000001kkkkkjjjjjddddd", &a)) {
|
||||||
@ -2124,44 +2124,44 @@ const char* la64_print(uint32_t opcode, uintptr_t addr)
|
|||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "01110011100100iiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "01110011100100iiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x", "VSHUF4I.B", Vt[Rd], Vt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%lx", "VSHUF4I.B", Vt[Rd], Vt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "01110011100101iiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "01110011100101iiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x", "VSHUF4I.H", Vt[Rd], Vt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%lx", "VSHUF4I.H", Vt[Rd], Vt[Rj], imm);
|
||||||
|
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "01110011100110iiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "01110011100110iiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x", "VSHUF4I.W", Vt[Rd], Vt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%lx", "VSHUF4I.W", Vt[Rd], Vt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "01110011100111iiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "01110011100111iiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x", "VSHUF4I.D", Vt[Rd], Vt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%lx", "VSHUF4I.D", Vt[Rd], Vt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "01110011100000iiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "01110011100000iiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x", "VEXTRINS.D", Vt[Rd], Vt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%lx", "VEXTRINS.D", Vt[Rd], Vt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "01110011100001iiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "01110011100001iiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x", "VEXTRINS.W", Vt[Rd], Vt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%lx", "VEXTRINS.W", Vt[Rd], Vt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "01110011100010iiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "01110011100010iiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x", "VEXTRINS.H", Vt[Rd], Vt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%lx", "VEXTRINS.H", Vt[Rd], Vt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "01110011100011iiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "01110011100011iiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%x", "VEXTRINS.B", Vt[Rd], Vt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, 0x%lx", "VEXTRINS.B", Vt[Rd], Vt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010110000iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010110000iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "VLD", Vt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "VLD", Vt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0010110001iiiiiiiiiiiijjjjjddddd", &a)) {
|
if (isMask(opcode, "0010110001iiiiiiiiiiiijjjjjddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %s, %d", "VST", Vt[Rd], Xt[Rj], signExtend(imm, 12));
|
snprintf(buff, sizeof(buff), "%-15s %s, %s, %ld", "VST", Vt[Rd], Xt[Rj], signExtend(imm, 12));
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000000000001000000000101000", &a)) {
|
if (isMask(opcode, "00000000000000001000000000101000", &a)) {
|
||||||
@ -2181,7 +2181,7 @@ const char* la64_print(uint32_t opcode, uintptr_t addr)
|
|||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000000000001110000iii00000", &a)) {
|
if (isMask(opcode, "000000000000000001110000iii00000", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %d", "X64SETTOP", imm);
|
snprintf(buff, sizeof(buff), "%-15s %lu", "X64SETTOP", imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000000000001110100000ddddd", &a)) {
|
if (isMask(opcode, "000000000000000001110100000ddddd", &a)) {
|
||||||
@ -2189,15 +2189,15 @@ const char* la64_print(uint32_t opcode, uintptr_t addr)
|
|||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010111iiiiiiii00000ddddd", &a)) {
|
if (isMask(opcode, "00000000010111iiiiiiii00000ddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, 0x%x", "X64GETEFLAGS", Xt[Rd], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, 0x%lx", "X64GETEFLAGS", Xt[Rd], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010111iiiiiiii00001ddddd", &a)) {
|
if (isMask(opcode, "00000000010111iiiiiiii00001ddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, 0x%x", "X64SETEFLAGS", Xt[Rd], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, 0x%lx", "X64SETEFLAGS", Xt[Rd], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000011011010iiii00000ddddd", &a)) {
|
if (isMask(opcode, "000000000011011010iiii00000ddddd", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, 0x%x", "X64SETJ", Xt[Rd], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, 0x%lx", "X64SETJ", Xt[Rd], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000000000000100000jjjjj00000", &a)) {
|
if (isMask(opcode, "0000000000000000100000jjjjj00000", &a)) {
|
||||||
@ -2505,115 +2505,115 @@ const char* la64_print(uint32_t opcode, uintptr_t addr)
|
|||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010100001iiijjjjj00000", &a)) {
|
if (isMask(opcode, "0000000001010100001iiijjjjj00000", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64SLLI.B", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64SLLI.B", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010100001iiijjjjj00100", &a)) {
|
if (isMask(opcode, "0000000001010100001iiijjjjj00100", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64SRLI.B", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64SRLI.B", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010100001iiijjjjj01000", &a)) {
|
if (isMask(opcode, "0000000001010100001iiijjjjj01000", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64SRAI.B", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64SRAI.B", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010100001iiijjjjj01100", &a)) {
|
if (isMask(opcode, "0000000001010100001iiijjjjj01100", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64ROTRI.B", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64ROTRI.B", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010100001iiijjjjj10000", &a)) {
|
if (isMask(opcode, "0000000001010100001iiijjjjj10000", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64RCRI.B", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64RCRI.B", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010100001iiijjjjj10100", &a)) {
|
if (isMask(opcode, "0000000001010100001iiijjjjj10100", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64ROTLI.B", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64ROTLI.B", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010100001iiijjjjj11000", &a)) {
|
if (isMask(opcode, "0000000001010100001iiijjjjj11000", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64RCLI.B", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64RCLI.B", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000101010001iiiijjjjj00001", &a)) {
|
if (isMask(opcode, "000000000101010001iiiijjjjj00001", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64SLLI.H", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64SLLI.H", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000101010001iiiijjjjj00101", &a)) {
|
if (isMask(opcode, "000000000101010001iiiijjjjj00101", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64SRLI.H", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64SRLI.H", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000101010001iiiijjjjj01001", &a)) {
|
if (isMask(opcode, "000000000101010001iiiijjjjj01001", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64SRAI.H", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64SRAI.H", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000101010001iiiijjjjj01101", &a)) {
|
if (isMask(opcode, "000000000101010001iiiijjjjj01101", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64ROTRI.H", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64ROTRI.H", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000101010001iiiijjjjj10001", &a)) {
|
if (isMask(opcode, "000000000101010001iiiijjjjj10001", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64RCRI.H", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64RCRI.H", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000101010001iiiijjjjj10101", &a)) {
|
if (isMask(opcode, "000000000101010001iiiijjjjj10101", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64ROTLI.H", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64ROTLI.H", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "000000000101010001iiiijjjjj11001", &a)) {
|
if (isMask(opcode, "000000000101010001iiiijjjjj11001", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64RCLI.H", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64RCLI.H", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010101001iiiiijjjjj00010", &a)) {
|
if (isMask(opcode, "00000000010101001iiiiijjjjj00010", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64SLLI.W", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64SLLI.W", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010101001iiiiijjjjj00110", &a)) {
|
if (isMask(opcode, "00000000010101001iiiiijjjjj00110", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64SRLI.W", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64SRLI.W", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010101001iiiiijjjjj01010", &a)) {
|
if (isMask(opcode, "00000000010101001iiiiijjjjj01010", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64SRAI.W", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64SRAI.W", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010101001iiiiijjjjj01110", &a)) {
|
if (isMask(opcode, "00000000010101001iiiiijjjjj01110", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64ROTRI.W", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64ROTRI.W", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010101001iiiiijjjjj10010", &a)) {
|
if (isMask(opcode, "00000000010101001iiiiijjjjj10010", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64RCRI.W", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64RCRI.W", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010101001iiiiijjjjj10110", &a)) {
|
if (isMask(opcode, "00000000010101001iiiiijjjjj10110", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64ROTLI.W", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64ROTLI.W", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "00000000010101001iiiiijjjjj11010", &a)) {
|
if (isMask(opcode, "00000000010101001iiiiijjjjj11010", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64RCLI.W", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64RCLI.W", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010101iiiiiijjjjj00011", &a)) {
|
if (isMask(opcode, "0000000001010101iiiiiijjjjj00011", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64SLLI.D", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64SLLI.D", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010101iiiiiijjjjj00111", &a)) {
|
if (isMask(opcode, "0000000001010101iiiiiijjjjj00111", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64SRLI.D", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64SRLI.D", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010101iiiiiijjjjj01011", &a)) {
|
if (isMask(opcode, "0000000001010101iiiiiijjjjj01011", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64SRAI.D", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64SRAI.D", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010101iiiiiijjjjj01111", &a)) {
|
if (isMask(opcode, "0000000001010101iiiiiijjjjj01111", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64ROTRI.D", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64ROTRI.D", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010101iiiiiijjjjj10011", &a)) {
|
if (isMask(opcode, "0000000001010101iiiiiijjjjj10011", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64RCRI.D", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64RCRI.D", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010101iiiiiijjjjj10111", &a)) {
|
if (isMask(opcode, "0000000001010101iiiiiijjjjj10111", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64ROTLI.D", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64ROTLI.D", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
if (isMask(opcode, "0000000001010101iiiiiijjjjj11011", &a)) {
|
if (isMask(opcode, "0000000001010101iiiiiijjjjj11011", &a)) {
|
||||||
snprintf(buff, sizeof(buff), "%-15s %s, %d", "X64RCLI.D", Xt[Rj], imm);
|
snprintf(buff, sizeof(buff), "%-15s %s, %lu", "X64RCLI.D", Xt[Rj], imm);
|
||||||
return buff;
|
return buff;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -1273,7 +1273,7 @@ uintptr_t dynarec64_660F(dynarec_rv64_t* dyn, uintptr_t addr, uintptr_t ip, int
|
|||||||
GETGX();
|
GETGX();
|
||||||
GETED(1);
|
GETED(1);
|
||||||
u8 = F8;
|
u8 = F8;
|
||||||
SB(ed, gback, gdoffset + u8 & 0xF);
|
SB(ed, gback, gdoffset + (u8 & 0xF));
|
||||||
break;
|
break;
|
||||||
case 0x21:
|
case 0x21:
|
||||||
INST_NAME("INSERTPS GX, EX, Ib");
|
INST_NAME("INSERTPS GX, EX, Ib");
|
||||||
|
@ -954,7 +954,7 @@ void x87_do_push_empty(dynarec_rv64_t* dyn, int ninst, int s1)
|
|||||||
if(s1)
|
if(s1)
|
||||||
x87_stackcount(dyn, ninst, s1);
|
x87_stackcount(dyn, ninst, s1);
|
||||||
}
|
}
|
||||||
void static internal_x87_dopop(dynarec_rv64_t* dyn)
|
static void internal_x87_dopop(dynarec_rv64_t* dyn)
|
||||||
{
|
{
|
||||||
for(int i=0; i<8; ++i)
|
for(int i=0; i<8; ++i)
|
||||||
if(dyn->e.x87cache[i]!=-1) {
|
if(dyn->e.x87cache[i]!=-1) {
|
||||||
@ -965,7 +965,7 @@ void static internal_x87_dopop(dynarec_rv64_t* dyn)
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
int static internal_x87_dofree(dynarec_rv64_t* dyn)
|
static int internal_x87_dofree(dynarec_rv64_t* dyn)
|
||||||
{
|
{
|
||||||
if(dyn->e.tags&0b11) {
|
if(dyn->e.tags&0b11) {
|
||||||
MESSAGE(LOG_DUMP, "\t--------x87 FREED ST0, poping 1 more\n");
|
MESSAGE(LOG_DUMP, "\t--------x87 FREED ST0, poping 1 more\n");
|
||||||
@ -2361,8 +2361,8 @@ void rv64_move32(dynarec_rv64_t* dyn, int ninst, int reg, int32_t val, int zerou
|
|||||||
src = reg;
|
src = reg;
|
||||||
}
|
}
|
||||||
if (lo12 || !hi20) ADDIW(reg, src, lo12);
|
if (lo12 || !hi20) ADDIW(reg, src, lo12);
|
||||||
if((zeroup && ((hi20&0x80000) || (!hi20 && (lo12&0x800)))
|
if((zeroup && ((hi20&0x80000) || (!hi20 && (lo12&0x800))))
|
||||||
|| (!zeroup && !(val&0x80000000) && ((hi20&0x80000) || (!hi20 && (lo12&0x800)))))) {
|
|| (!zeroup && !(val&0x80000000) && ((hi20&0x80000) || (!hi20 && (lo12&0x800))))) {
|
||||||
ZEROUP(reg);
|
ZEROUP(reg);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -392,7 +392,7 @@
|
|||||||
ANDI(gd, gb1, 0xff);
|
ANDI(gd, gb1, 0xff);
|
||||||
|
|
||||||
// Write gb (gd) back to original register / memory, using s1 as scratch
|
// Write gb (gd) back to original register / memory, using s1 as scratch
|
||||||
#define GBBACK(s1) \
|
#define GBBACK(s1) do { \
|
||||||
if (gb2) { \
|
if (gb2) { \
|
||||||
MOV64x(s1, 0xffffffffffff00ffLL); \
|
MOV64x(s1, 0xffffffffffff00ffLL); \
|
||||||
AND(gb1, gb1, s1); \
|
AND(gb1, gb1, s1); \
|
||||||
@ -401,7 +401,7 @@
|
|||||||
} else { \
|
} else { \
|
||||||
ANDI(gb1, gb1, ~0xff); \
|
ANDI(gb1, gb1, ~0xff); \
|
||||||
OR(gb1, gb1, gd); \
|
OR(gb1, gb1, gd); \
|
||||||
}
|
} } while (0)
|
||||||
|
|
||||||
// Write eb (ed) back to original register / memory, using s1 as scratch
|
// Write eb (ed) back to original register / memory, using s1 as scratch
|
||||||
#define EBBACK(s1, c) \
|
#define EBBACK(s1, c) \
|
||||||
@ -876,7 +876,7 @@
|
|||||||
ANDI(scratch1, scratch2, 0x80); \
|
ANDI(scratch1, scratch2, 0x80); \
|
||||||
} else { \
|
} else { \
|
||||||
SRLI(scratch1, scratch2, (width)-1); \
|
SRLI(scratch1, scratch2, (width)-1); \
|
||||||
if (width != 64) ANDI(scratch1, scratch1, 1); \
|
if ((width) != 64) ANDI(scratch1, scratch1, 1); \
|
||||||
} \
|
} \
|
||||||
BEQZ(scratch1, 8); \
|
BEQZ(scratch1, 8); \
|
||||||
ORI(xFlags, xFlags, 1 << F_CF); \
|
ORI(xFlags, xFlags, 1 << F_CF); \
|
||||||
@ -940,7 +940,7 @@
|
|||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifndef MAYSETFLAGS
|
#ifndef MAYSETFLAGS
|
||||||
#define MAYSETFLAGS()
|
#define MAYSETFLAGS() do {} while (0)
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#ifndef READFLAGS
|
#ifndef READFLAGS
|
||||||
|
@ -5,7 +5,7 @@
|
|||||||
dyn->insts[ninst].x64.addr = addr; \
|
dyn->insts[ninst].x64.addr = addr; \
|
||||||
if(ninst) dyn->insts[ninst-1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst-1].x64.addr
|
if(ninst) dyn->insts[ninst-1].x64.size = dyn->insts[ninst].x64.addr - dyn->insts[ninst-1].x64.addr
|
||||||
|
|
||||||
#define MESSAGE(A, ...)
|
#define MESSAGE(A, ...) do {} while (0)
|
||||||
#define MAYSETFLAGS() dyn->insts[ninst].x64.may_set = 1
|
#define MAYSETFLAGS() dyn->insts[ninst].x64.may_set = 1
|
||||||
#define READFLAGS(A) \
|
#define READFLAGS(A) \
|
||||||
dyn->insts[ninst].x64.use_flags = A; dyn->f.dfnone = 1;\
|
dyn->insts[ninst].x64.use_flags = A; dyn->f.dfnone = 1;\
|
||||||
|
@ -1,7 +1,7 @@
|
|||||||
#define INIT
|
#define INIT
|
||||||
#define FINI
|
#define FINI
|
||||||
#define MESSAGE(A, ...)
|
#define MESSAGE(A, ...) do {} while (0)
|
||||||
#define EMIT(A)
|
#define EMIT(A) do {} while (0)
|
||||||
#define NEW_INST \
|
#define NEW_INST \
|
||||||
dyn->insts[ninst].f_entry = dyn->f; \
|
dyn->insts[ninst].f_entry = dyn->f; \
|
||||||
dyn->e.combined1 = dyn->e.combined2 = 0;\
|
dyn->e.combined1 = dyn->e.combined2 = 0;\
|
||||||
|
@ -5,7 +5,7 @@
|
|||||||
dyn->insts_size += 1+((dyn->insts[ninst].x64.size>(dyn->insts[ninst].size/4))?dyn->insts[ninst].x64.size:(dyn->insts[ninst].size/4))/15; \
|
dyn->insts_size += 1+((dyn->insts[ninst].x64.size>(dyn->insts[ninst].size/4))?dyn->insts[ninst].x64.size:(dyn->insts[ninst].size/4))/15; \
|
||||||
}
|
}
|
||||||
|
|
||||||
#define MESSAGE(A, ...)
|
#define MESSAGE(A, ...) do {} while (0)
|
||||||
#define EMIT(A) do {dyn->insts[ninst].size+=4; dyn->native_size+=4;}while(0)
|
#define EMIT(A) do {dyn->insts[ninst].size+=4; dyn->native_size+=4;}while(0)
|
||||||
#define NEW_INST \
|
#define NEW_INST \
|
||||||
if(ninst) { \
|
if(ninst) { \
|
||||||
|
@ -112,18 +112,18 @@ f28–31 ft8–11 FP temporaries Caller
|
|||||||
// MOV64x/MOV32w is quite complex, so use a function for this
|
// MOV64x/MOV32w is quite complex, so use a function for this
|
||||||
#define MOV64x(A, B) rv64_move64(dyn, ninst, A, B)
|
#define MOV64x(A, B) rv64_move64(dyn, ninst, A, B)
|
||||||
#define MOV32w(A, B) rv64_move32(dyn, ninst, A, B, 1)
|
#define MOV32w(A, B) rv64_move32(dyn, ninst, A, B, 1)
|
||||||
#define MOV64xw(A, B) \
|
#define MOV64xw(A, B) do { \
|
||||||
if (rex.w) { \
|
if (rex.w) { \
|
||||||
MOV64x(A, B); \
|
MOV64x(A, B); \
|
||||||
} else { \
|
} else { \
|
||||||
MOV32w(A, B); \
|
MOV32w(A, B); \
|
||||||
}
|
} } while (0)
|
||||||
#define MOV64z(A, B) \
|
#define MOV64z(A, B) do { \
|
||||||
if (rex.is32bits) { \
|
if (rex.is32bits) { \
|
||||||
MOV32w(A, B); \
|
MOV32w(A, B); \
|
||||||
} else { \
|
} else { \
|
||||||
MOV64x(A, B); \
|
MOV64x(A, B); \
|
||||||
}
|
} } while (0)
|
||||||
|
|
||||||
// ZERO the upper part
|
// ZERO the upper part
|
||||||
#define ZEROUP(r) AND(r, r, xMASK)
|
#define ZEROUP(r) AND(r, r, xMASK)
|
||||||
@ -225,19 +225,19 @@ f28–31 ft8–11 FP temporaries Caller
|
|||||||
// rd = rs1 (pseudo instruction)
|
// rd = rs1 (pseudo instruction)
|
||||||
#define MV(rd, rs1) ADDI(rd, rs1, 0)
|
#define MV(rd, rs1) ADDI(rd, rs1, 0)
|
||||||
// rd = rs1 (pseudo instruction)
|
// rd = rs1 (pseudo instruction)
|
||||||
#define MVxw(rd, rs1) \
|
#define MVxw(rd, rs1) do { \
|
||||||
if (rex.w) { \
|
if (rex.w) { \
|
||||||
MV(rd, rs1); \
|
MV(rd, rs1); \
|
||||||
} else { \
|
} else { \
|
||||||
AND(rd, rs1, xMASK); \
|
AND(rd, rs1, xMASK); \
|
||||||
}
|
} } while (0)
|
||||||
// rd = rs1 (pseudo instruction)
|
// rd = rs1 (pseudo instruction)
|
||||||
#define MVz(rd, rs1) \
|
#define MVz(rd, rs1) do { \
|
||||||
if (rex.is32bits) { \
|
if (rex.is32bits) { \
|
||||||
AND(rd, rs1, xMASK); \
|
AND(rd, rs1, xMASK); \
|
||||||
} else { \
|
} else { \
|
||||||
MV(rd, rs1); \
|
MV(rd, rs1); \
|
||||||
}
|
} } while (0)
|
||||||
// rd = !rs1
|
// rd = !rs1
|
||||||
#define NOT(rd, rs1) XORI(rd, rs1, -1)
|
#define NOT(rd, rs1) XORI(rd, rs1, -1)
|
||||||
// rd = -rs1
|
// rd = -rs1
|
||||||
@ -346,7 +346,7 @@ f28–31 ft8–11 FP temporaries Caller
|
|||||||
|
|
||||||
#define PUSH1(reg) \
|
#define PUSH1(reg) \
|
||||||
do { \
|
do { \
|
||||||
SD(reg, xRSP, -8); \
|
SD(reg, xRSP, 0xFF8); \
|
||||||
SUBI(xRSP, xRSP, 8); \
|
SUBI(xRSP, xRSP, 8); \
|
||||||
} while (0)
|
} while (0)
|
||||||
#define POP1(reg) \
|
#define POP1(reg) \
|
||||||
@ -356,7 +356,7 @@ f28–31 ft8–11 FP temporaries Caller
|
|||||||
} while (0)
|
} while (0)
|
||||||
#define PUSH1_32(reg) \
|
#define PUSH1_32(reg) \
|
||||||
do { \
|
do { \
|
||||||
SW(reg, xRSP, -4); \
|
SW(reg, xRSP, 0xFFC); \
|
||||||
SUBIW(xRSP, xRSP, 4); \
|
SUBIW(xRSP, xRSP, 4); \
|
||||||
} while (0)
|
} while (0)
|
||||||
#define POP1_32(reg) \
|
#define POP1_32(reg) \
|
||||||
@ -380,7 +380,7 @@ f28–31 ft8–11 FP temporaries Caller
|
|||||||
|
|
||||||
#define PUSH1_16(reg) \
|
#define PUSH1_16(reg) \
|
||||||
do { \
|
do { \
|
||||||
SH(reg, xRSP, -2); \
|
SH(reg, xRSP, 0xFFE); \
|
||||||
SUBI(xRSP, xRSP, 2); \
|
SUBI(xRSP, xRSP, 2); \
|
||||||
} while (0)
|
} while (0)
|
||||||
|
|
||||||
@ -452,60 +452,60 @@ f28–31 ft8–11 FP temporaries Caller
|
|||||||
// rd = rs1>>rs2 arithmetic
|
// rd = rs1>>rs2 arithmetic
|
||||||
#define SRAW(rd, rs1, rs2) EMIT(R_type(0b0100000, rs2, rs1, 0b101, rd, 0b0111011))
|
#define SRAW(rd, rs1, rs2) EMIT(R_type(0b0100000, rs2, rs1, 0b101, rd, 0b0111011))
|
||||||
|
|
||||||
#define SLLxw(rd, rs1, rs2) \
|
#define SLLxw(rd, rs1, rs2) do { \
|
||||||
if (rex.w) { \
|
if (rex.w) { \
|
||||||
SLL(rd, rs1, rs2); \
|
SLL(rd, rs1, rs2); \
|
||||||
} else { \
|
} else { \
|
||||||
SLLW(rd, rs1, rs2); \
|
SLLW(rd, rs1, rs2); \
|
||||||
ZEROUP(rd); \
|
ZEROUP(rd); \
|
||||||
}
|
} } while (0)
|
||||||
|
|
||||||
#define SRLxw(rd, rs1, rs2) \
|
#define SRLxw(rd, rs1, rs2) do { \
|
||||||
if (rex.w) { \
|
if (rex.w) { \
|
||||||
SRL(rd, rs1, rs2); \
|
SRL(rd, rs1, rs2); \
|
||||||
} else { \
|
} else { \
|
||||||
SRLW(rd, rs1, rs2); \
|
SRLW(rd, rs1, rs2); \
|
||||||
ZEROUP(rd); \
|
ZEROUP(rd); \
|
||||||
}
|
} } while (0)
|
||||||
|
|
||||||
#define SRAxw(rd, rs1, rs2) \
|
#define SRAxw(rd, rs1, rs2) do { \
|
||||||
if (rex.w) { \
|
if (rex.w) { \
|
||||||
SRA(rd, rs1, rs2); \
|
SRA(rd, rs1, rs2); \
|
||||||
} else { \
|
} else { \
|
||||||
SRAW(rd, rs1, rs2); \
|
SRAW(rd, rs1, rs2); \
|
||||||
ZEROUP(rd); \
|
ZEROUP(rd); \
|
||||||
}
|
} } while (0)
|
||||||
|
|
||||||
// Shift Left Immediate, 32-bit, sign-extended
|
// Shift Left Immediate, 32-bit, sign-extended
|
||||||
#define SLLIW(rd, rs1, imm5) EMIT(I_type(imm5, rs1, 0b001, rd, 0b0011011))
|
#define SLLIW(rd, rs1, imm5) EMIT(I_type(imm5, rs1, 0b001, rd, 0b0011011))
|
||||||
// Shift Left Immediate
|
// Shift Left Immediate
|
||||||
#define SLLIxw(rd, rs1, imm) \
|
#define SLLIxw(rd, rs1, imm) do { \
|
||||||
if (rex.w) { \
|
if (rex.w) { \
|
||||||
SLLI(rd, rs1, imm); \
|
SLLI(rd, rs1, imm); \
|
||||||
} else { \
|
} else { \
|
||||||
SLLIW(rd, rs1, imm); \
|
SLLIW(rd, rs1, imm); \
|
||||||
ZEROUP(rd); \
|
ZEROUP(rd); \
|
||||||
}
|
} } while (0)
|
||||||
// Shift Right Logical Immediate, 32-bit, sign-extended
|
// Shift Right Logical Immediate, 32-bit, sign-extended
|
||||||
#define SRLIW(rd, rs1, imm5) EMIT(I_type(imm5, rs1, 0b101, rd, 0b0011011))
|
#define SRLIW(rd, rs1, imm5) EMIT(I_type(imm5, rs1, 0b101, rd, 0b0011011))
|
||||||
// Shift Right Logical Immediate
|
// Shift Right Logical Immediate
|
||||||
#define SRLIxw(rd, rs1, imm) \
|
#define SRLIxw(rd, rs1, imm) do { \
|
||||||
if (rex.w) { \
|
if (rex.w) { \
|
||||||
SRLI(rd, rs1, imm); \
|
SRLI(rd, rs1, imm); \
|
||||||
} else { \
|
} else { \
|
||||||
SRLIW(rd, rs1, imm); \
|
SRLIW(rd, rs1, imm); \
|
||||||
if ((imm) == 0) ZEROUP(rd); \
|
if ((imm) == 0) ZEROUP(rd); \
|
||||||
}
|
} } while (0)
|
||||||
// Shift Right Arithmetic Immediate, 32-bit, sign-extended
|
// Shift Right Arithmetic Immediate, 32-bit, sign-extended
|
||||||
#define SRAIW(rd, rs1, imm5) EMIT(I_type((imm5) | (0b0100000 << 5), rs1, 0b101, rd, 0b0011011))
|
#define SRAIW(rd, rs1, imm5) EMIT(I_type((imm5) | (0b0100000 << 5), rs1, 0b101, rd, 0b0011011))
|
||||||
// Shift Right Arithmetic Immediate
|
// Shift Right Arithmetic Immediate
|
||||||
#define SRAIxw(rd, rs1, imm) \
|
#define SRAIxw(rd, rs1, imm) do { \
|
||||||
if (rex.w) { \
|
if (rex.w) { \
|
||||||
SRAI(rd, rs1, imm); \
|
SRAI(rd, rs1, imm); \
|
||||||
} else { \
|
} else { \
|
||||||
SRAIW(rd, rs1, imm); \
|
SRAIW(rd, rs1, imm); \
|
||||||
ZEROUP(rd); \
|
ZEROUP(rd); \
|
||||||
}
|
} } while (0)
|
||||||
|
|
||||||
#define CSRRW(rd, rs1, csr) EMIT(I_type(csr, rs1, 0b001, rd, 0b1110011))
|
#define CSRRW(rd, rs1, csr) EMIT(I_type(csr, rs1, 0b001, rd, 0b1110011))
|
||||||
#define CSRRS(rd, rs1, csr) EMIT(I_type(csr, rs1, 0b010, rd, 0b1110011))
|
#define CSRRS(rd, rs1, csr) EMIT(I_type(csr, rs1, 0b010, rd, 0b1110011))
|
||||||
@ -1243,58 +1243,58 @@ f28–31 ft8–11 FP temporaries Caller
|
|||||||
#define VLM_V(vd, rs1) EMIT(I_type(0b000000101011, rs1, 0b000, vd, 0b0000111)) // 000000101011.....000.....0000111
|
#define VLM_V(vd, rs1) EMIT(I_type(0b000000101011, rs1, 0b000, vd, 0b0000111)) // 000000101011.....000.....0000111
|
||||||
#define VSM_V(vs3, rs1) EMIT(I_type(0b000000101011, rs1, 0b000, vs3, 0b0100111)) // 000000101011.....000.....0100111
|
#define VSM_V(vs3, rs1) EMIT(I_type(0b000000101011, rs1, 0b000, vs3, 0b0100111)) // 000000101011.....000.....0100111
|
||||||
|
|
||||||
#define VLE8_V(vd, rs1, vm, nf) EMIT(I_type((nf << 9) | (vm << 5), rs1, 0b000, vd, 0b0000111)) // ...000.00000.....000.....0000111
|
#define VLE8_V(vd, rs1, vm, nf) EMIT(I_type(((nf) << 9) | (vm << 5), rs1, 0b000, vd, 0b0000111)) // ...000.00000.....000.....0000111
|
||||||
#define VLE16_V(vd, rs1, vm, nf) EMIT(I_type((nf << 9) | (vm << 5), rs1, 0b101, vd, 0b0000111)) // ...000.00000.....101.....0000111
|
#define VLE16_V(vd, rs1, vm, nf) EMIT(I_type(((nf) << 9) | (vm << 5), rs1, 0b101, vd, 0b0000111)) // ...000.00000.....101.....0000111
|
||||||
#define VLE32_V(vd, rs1, vm, nf) EMIT(I_type((nf << 9) | (vm << 5), rs1, 0b110, vd, 0b0000111)) // ...000.00000.....110.....0000111
|
#define VLE32_V(vd, rs1, vm, nf) EMIT(I_type(((nf) << 9) | (vm << 5), rs1, 0b110, vd, 0b0000111)) // ...000.00000.....110.....0000111
|
||||||
#define VLE64_V(vd, rs1, vm, nf) EMIT(I_type((nf << 9) | (vm << 5), rs1, 0b111, vd, 0b0000111)) // ...000.00000.....111.....0000111
|
#define VLE64_V(vd, rs1, vm, nf) EMIT(I_type(((nf) << 9) | (vm << 5), rs1, 0b111, vd, 0b0000111)) // ...000.00000.....111.....0000111
|
||||||
#define VSE8_V(vs3, rs1, vm, nf) EMIT(I_type((nf << 9) | (vm << 5), rs1, 0b000, vs3, 0b0100111)) // ...000.00000.....000.....0100111
|
#define VSE8_V(vs3, rs1, vm, nf) EMIT(I_type(((nf) << 9) | (vm << 5), rs1, 0b000, vs3, 0b0100111)) // ...000.00000.....000.....0100111
|
||||||
#define VSE16_V(vs3, rs1, vm, nf) EMIT(I_type((nf << 9) | (vm << 5), rs1, 0b101, vs3, 0b0100111)) // ...000.00000.....101.....0100111
|
#define VSE16_V(vs3, rs1, vm, nf) EMIT(I_type(((nf) << 9) | (vm << 5), rs1, 0b101, vs3, 0b0100111)) // ...000.00000.....101.....0100111
|
||||||
#define VSE32_V(vs3, rs1, vm, nf) EMIT(I_type((nf << 9) | (vm << 5), rs1, 0b110, vs3, 0b0100111)) // ...000.00000.....110.....0100111
|
#define VSE32_V(vs3, rs1, vm, nf) EMIT(I_type(((nf) << 9) | (vm << 5), rs1, 0b110, vs3, 0b0100111)) // ...000.00000.....110.....0100111
|
||||||
#define VSE64_V(vs3, rs1, vm, nf) EMIT(I_type((nf << 9) | (vm << 5), rs1, 0b111, vs3, 0b0100111)) // ...000.00000.....111.....0100111
|
#define VSE64_V(vs3, rs1, vm, nf) EMIT(I_type(((nf) << 9) | (vm << 5), rs1, 0b111, vs3, 0b0100111)) // ...000.00000.....111.....0100111
|
||||||
|
|
||||||
// Vector Indexed-Unordered Instructions (including segment part)
|
// Vector Indexed-Unordered Instructions (including segment part)
|
||||||
// https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#76-vector-indexed-instructions
|
// https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#76-vector-indexed-instructions
|
||||||
|
|
||||||
#define VLUXEI8_V(vd, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0010, vs2, rs1, 0b000, vd, 0b0000111)) // ...001...........000.....0000111
|
#define VLUXEI8_V(vd, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0010, vs2, rs1, 0b000, vd, 0b0000111)) // ...001...........000.....0000111
|
||||||
#define VLUXEI16_V(vd, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0010, vs2, rs1, 0b101, vd, 0b0000111)) // ...001...........101.....0000111
|
#define VLUXEI16_V(vd, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0010, vs2, rs1, 0b101, vd, 0b0000111)) // ...001...........101.....0000111
|
||||||
#define VLUXEI32_V(vd, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0010, vs2, rs1, 0b110, vd, 0b0000111)) // ...001...........110.....0000111
|
#define VLUXEI32_V(vd, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0010, vs2, rs1, 0b110, vd, 0b0000111)) // ...001...........110.....0000111
|
||||||
#define VLUXEI64_V(vd, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0010, vs2, rs1, 0b111, vd, 0b0000111)) // ...001...........111.....0000111
|
#define VLUXEI64_V(vd, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0010, vs2, rs1, 0b111, vd, 0b0000111)) // ...001...........111.....0000111
|
||||||
#define VSUXEI8_V(vs3, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0010, vs2, rs1, 0b000, vs3, 0b0100111)) // ...001...........000.....0100111
|
#define VSUXEI8_V(vs3, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0010, vs2, rs1, 0b000, vs3, 0b0100111)) // ...001...........000.....0100111
|
||||||
#define VSUXEI16_V(vs3, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0010, vs2, rs1, 0b101, vs3, 0b0100111)) // ...001...........101.....0100111
|
#define VSUXEI16_V(vs3, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0010, vs2, rs1, 0b101, vs3, 0b0100111)) // ...001...........101.....0100111
|
||||||
#define VSUXEI32_V(vs3, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0010, vs2, rs1, 0b110, vs3, 0b0100111)) // ...001...........110.....0100111
|
#define VSUXEI32_V(vs3, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0010, vs2, rs1, 0b110, vs3, 0b0100111)) // ...001...........110.....0100111
|
||||||
#define VSUXEI64_V(vs3, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0010, vs2, rs1, 0b111, vs3, 0b0100111)) // ...001...........111.....0100111
|
#define VSUXEI64_V(vs3, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0010, vs2, rs1, 0b111, vs3, 0b0100111)) // ...001...........111.....0100111
|
||||||
|
|
||||||
// Vector Strided Instructions (including segment part)
|
// Vector Strided Instructions (including segment part)
|
||||||
// https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#75-vector-strided-instructions
|
// https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#75-vector-strided-instructions
|
||||||
|
|
||||||
#define VLSE8_V(vd, rs1, rs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0100, rs2, rs1, 0b000, vd, 0b0000111)) // ...010...........000.....0000111
|
#define VLSE8_V(vd, rs1, rs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0100, rs2, rs1, 0b000, vd, 0b0000111)) // ...010...........000.....0000111
|
||||||
#define VLSE16_V(vd, rs1, rs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0100, rs2, rs1, 0b101, vd, 0b0000111)) // ...010...........101.....0000111
|
#define VLSE16_V(vd, rs1, rs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0100, rs2, rs1, 0b101, vd, 0b0000111)) // ...010...........101.....0000111
|
||||||
#define VLSE32_V(vd, rs1, rs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0100, rs2, rs1, 0b110, vd, 0b0000111)) // ...010...........110.....0000111
|
#define VLSE32_V(vd, rs1, rs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0100, rs2, rs1, 0b110, vd, 0b0000111)) // ...010...........110.....0000111
|
||||||
#define VLSE64_V(vd, rs1, rs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0100, rs2, rs1, 0b111, vd, 0b0000111)) // ...010...........111.....0000111
|
#define VLSE64_V(vd, rs1, rs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0100, rs2, rs1, 0b111, vd, 0b0000111)) // ...010...........111.....0000111
|
||||||
#define VSSE8_V(vs3, rs1, rs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0100, rs2, rs1, 0b000, vs3, 0b0100111)) // ...010...........000.....0100111
|
#define VSSE8_V(vs3, rs1, rs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0100, rs2, rs1, 0b000, vs3, 0b0100111)) // ...010...........000.....0100111
|
||||||
#define VSSE16_V(vs3, rs1, rs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0100, rs2, rs1, 0b101, vs3, 0b0100111)) // ...010...........101.....0100111
|
#define VSSE16_V(vs3, rs1, rs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0100, rs2, rs1, 0b101, vs3, 0b0100111)) // ...010...........101.....0100111
|
||||||
#define VSSE32_V(vs3, rs1, rs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0100, rs2, rs1, 0b110, vs3, 0b0100111)) // ...010...........110.....0100111
|
#define VSSE32_V(vs3, rs1, rs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0100, rs2, rs1, 0b110, vs3, 0b0100111)) // ...010...........110.....0100111
|
||||||
#define VSSE64_V(vs3, rs1, rs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0100, rs2, rs1, 0b111, vs3, 0b0100111)) // ...010...........111.....0100111
|
#define VSSE64_V(vs3, rs1, rs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0100, rs2, rs1, 0b111, vs3, 0b0100111)) // ...010...........111.....0100111
|
||||||
|
|
||||||
// Vector Indexed-Ordered Instructions (including segment part)
|
// Vector Indexed-Ordered Instructions (including segment part)
|
||||||
// https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#76-vector-indexed-instructions
|
// https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#76-vector-indexed-instructions
|
||||||
|
|
||||||
#define VLOXEI8_V(vd, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0110, vs2, rs1, 0b000, vd, 0b0000111)) // ...011...........000.....0000111
|
#define VLOXEI8_V(vd, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0110, vs2, rs1, 0b000, vd, 0b0000111)) // ...011...........000.....0000111
|
||||||
#define VLOXEI16_V(vd, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0110, vs2, rs1, 0b101, vd, 0b0000111)) // ...011...........101.....0000111
|
#define VLOXEI16_V(vd, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0110, vs2, rs1, 0b101, vd, 0b0000111)) // ...011...........101.....0000111
|
||||||
#define VLOXEI32_V(vd, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0110, vs2, rs1, 0b110, vd, 0b0000111)) // ...011...........110.....0000111
|
#define VLOXEI32_V(vd, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0110, vs2, rs1, 0b110, vd, 0b0000111)) // ...011...........110.....0000111
|
||||||
#define VLOXEI64_V(vd, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0110, vs2, rs1, 0b111, vd, 0b0000111)) // ...011...........111.....0000111
|
#define VLOXEI64_V(vd, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0110, vs2, rs1, 0b111, vd, 0b0000111)) // ...011...........111.....0000111
|
||||||
#define VSOXEI8_V(vs3, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0110, vs2, rs1, 0b000, vs3, 0b0100111)) // ...011...........000.....0100111
|
#define VSOXEI8_V(vs3, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0110, vs2, rs1, 0b000, vs3, 0b0100111)) // ...011...........000.....0100111
|
||||||
#define VSOXEI16_V(vs3, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0110, vs2, rs1, 0b101, vs3, 0b0100111)) // ...011...........101.....0100111
|
#define VSOXEI16_V(vs3, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0110, vs2, rs1, 0b101, vs3, 0b0100111)) // ...011...........101.....0100111
|
||||||
#define VSOXEI32_V(vs3, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0110, vs2, rs1, 0b110, vs3, 0b0100111)) // ...011...........110.....0100111
|
#define VSOXEI32_V(vs3, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0110, vs2, rs1, 0b110, vs3, 0b0100111)) // ...011...........110.....0100111
|
||||||
#define VSOXEI64_V(vs3, rs1, vs2, vm, nf) EMIT(R_type((nf << 4) | (vm) | 0b0110, vs2, rs1, 0b111, vs3, 0b0100111)) // ...011...........111.....0100111
|
#define VSOXEI64_V(vs3, rs1, vs2, vm, nf) EMIT(R_type(((nf) << 4) | (vm) | 0b0110, vs2, rs1, 0b111, vs3, 0b0100111)) // ...011...........111.....0100111
|
||||||
|
|
||||||
// Unit-stride F31..29=0ault-Only-First Loads
|
// Unit-stride F31..29=0ault-Only-First Loads
|
||||||
// https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#77-unit-stride-fault-only-first-loads
|
// https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#77-unit-stride-fault-only-first-loads
|
||||||
|
|
||||||
#define VLE8FF_V(vd, rs1, vm, nf) EMIT(R_type((nf << 4) | (vm), 0b10000, rs1, 0b000, vd, 0b0000111)) // ...000.10000.....000.....0000111
|
#define VLE8FF_V(vd, rs1, vm, nf) EMIT(R_type(((nf) << 4) | (vm), 0b10000, rs1, 0b000, vd, 0b0000111)) // ...000.10000.....000.....0000111
|
||||||
#define VLE16FF_V(vd, rs1, vm, nf) EMIT(R_type((nf << 4) | (vm), 0b10000, rs1, 0b101, vd, 0b0000111)) // ...000.10000.....101.....0000111
|
#define VLE16FF_V(vd, rs1, vm, nf) EMIT(R_type(((nf) << 4) | (vm), 0b10000, rs1, 0b101, vd, 0b0000111)) // ...000.10000.....101.....0000111
|
||||||
#define VLE32FF_V(vd, rs1, vm, nf) EMIT(R_type((nf << 4) | (vm), 0b10000, rs1, 0b110, vd, 0b0000111)) // ...000.10000.....110.....0000111
|
#define VLE32FF_V(vd, rs1, vm, nf) EMIT(R_type(((nf) << 4) | (vm), 0b10000, rs1, 0b110, vd, 0b0000111)) // ...000.10000.....110.....0000111
|
||||||
#define VLE64FF_V(vd, rs1, vm, nf) EMIT(R_type((nf << 4) | (vm), 0b10000, rs1, 0b111, vd, 0b0000111)) // ...000.10000.....111.....0000111
|
#define VLE64FF_V(vd, rs1, vm, nf) EMIT(R_type(((nf) << 4) | (vm), 0b10000, rs1, 0b111, vd, 0b0000111)) // ...000.10000.....111.....0000111
|
||||||
|
|
||||||
// Vector Load/Store Whole Registers
|
// Vector Load/Store Whole Registers
|
||||||
// https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#79-vector-loadstore-whole-register-instructions
|
// https://github.com/riscv/riscv-v-spec/blob/master/v-spec.adoc#79-vector-loadstore-whole-register-instructions
|
||||||
|
@ -325,7 +325,7 @@ Elf64_Sym* ElfSymTabLookup(elfheader_t* h, const char* symname)
|
|||||||
{
|
{
|
||||||
if(!h->SymTab)
|
if(!h->SymTab)
|
||||||
return 0;
|
return 0;
|
||||||
for(int i=0; i<h->numSymTab; ++i) {
|
for(size_t i=0; i<h->numSymTab; ++i) {
|
||||||
Elf64_Sym* sym = &h->SymTab[i];
|
Elf64_Sym* sym = &h->SymTab[i];
|
||||||
int type = ELF64_ST_TYPE(sym->st_info);
|
int type = ELF64_ST_TYPE(sym->st_info);
|
||||||
if(type==STT_FUNC || type==STT_TLS || type==STT_OBJECT) {
|
if(type==STT_FUNC || type==STT_TLS || type==STT_OBJECT) {
|
||||||
@ -341,7 +341,7 @@ Elf64_Sym* ElfDynSymLookup(elfheader_t* h, const char* symname)
|
|||||||
{
|
{
|
||||||
if(!h->DynSym)
|
if(!h->DynSym)
|
||||||
return 0;
|
return 0;
|
||||||
for(int i=0; i<h->numDynSym; ++i) {
|
for(size_t i=0; i<h->numDynSym; ++i) {
|
||||||
Elf64_Sym* sym = &h->DynSym[i];
|
Elf64_Sym* sym = &h->DynSym[i];
|
||||||
int type = ELF64_ST_TYPE(sym->st_info);
|
int type = ELF64_ST_TYPE(sym->st_info);
|
||||||
if(type==STT_FUNC || type==STT_TLS || type==STT_OBJECT) {
|
if(type==STT_FUNC || type==STT_TLS || type==STT_OBJECT) {
|
||||||
|
@ -296,7 +296,7 @@ int AllocLoadElfMemory(box64context_t* context, elfheader_t* head, int mainbin)
|
|||||||
ssize_t new_size = asize + (paddr-new_addr); // so need new_size to compensate
|
ssize_t new_size = asize + (paddr-new_addr); // so need new_size to compensate
|
||||||
while(getProtection(new_addr) && (new_size>0)) {// but then, there might be some overlap
|
while(getProtection(new_addr) && (new_size>0)) {// but then, there might be some overlap
|
||||||
uintptr_t diff = ALIGN(new_addr+1) - new_addr; // next page
|
uintptr_t diff = ALIGN(new_addr+1) - new_addr; // next page
|
||||||
if(diff<new_size)
|
if(diff<(size_t)new_size)
|
||||||
new_size -= diff;
|
new_size -= diff;
|
||||||
else
|
else
|
||||||
new_size = 0;
|
new_size = 0;
|
||||||
|
@ -623,10 +623,9 @@ static inline uint64_t readCycleCounter()
|
|||||||
static inline uint64_t readFreq()
|
static inline uint64_t readFreq()
|
||||||
{
|
{
|
||||||
static size_t val = -1;
|
static size_t val = -1;
|
||||||
if (val != -1) return val;
|
|
||||||
|
|
||||||
val = readBinarySizeFromFile("/sys/firmware/devicetree/base/cpus/timebase-frequency");
|
val = readBinarySizeFromFile("/sys/firmware/devicetree/base/cpus/timebase-frequency");
|
||||||
if (val != -1) return val;
|
if (val != (size_t)-1) return val;
|
||||||
|
|
||||||
// fallback to rdtime + sleep
|
// fallback to rdtime + sleep
|
||||||
struct timespec ts;
|
struct timespec ts;
|
||||||
|
@ -65,10 +65,10 @@ int Run(x64emu_t *emu, int step)
|
|||||||
//ref opcode: http://ref.x64asm.net/geek32.html#xA1
|
//ref opcode: http://ref.x64asm.net/geek32.html#xA1
|
||||||
printf_log(LOG_DEBUG, "Run X86 (%p), RIP=%p, Stack=%p is32bits=%d\n", emu, (void*)addr, (void*)R_RSP, is32bits);
|
printf_log(LOG_DEBUG, "Run X86 (%p), RIP=%p, Stack=%p is32bits=%d\n", emu, (void*)addr, (void*)R_RSP, is32bits);
|
||||||
|
|
||||||
x64emurun:
|
|
||||||
#ifdef TEST_INTERPRETER
|
#ifdef TEST_INTERPRETER
|
||||||
test->memsize = 0;
|
test->memsize = 0;
|
||||||
#else
|
#else
|
||||||
|
x64emurun:
|
||||||
while(1)
|
while(1)
|
||||||
#endif
|
#endif
|
||||||
{
|
{
|
||||||
|
@ -139,6 +139,7 @@ uintptr_t Run66F0(x64emu_t *emu, rex_t rex, uintptr_t addr)
|
|||||||
GETEW(0); \
|
GETEW(0); \
|
||||||
GETGW; \
|
GETGW; \
|
||||||
GW->word[0] = OP##16(emu, GW->word[0], EW->word[0]); \
|
GW->word[0] = OP##16(emu, GW->word[0], EW->word[0]); \
|
||||||
|
break; \
|
||||||
case B+5: \
|
case B+5: \
|
||||||
R_AX = OP##16(emu, R_AX, F16); \
|
R_AX = OP##16(emu, R_AX, F16); \
|
||||||
break;
|
break;
|
||||||
|
@ -145,11 +145,11 @@ uintptr_t RunAVX_0F38(x64emu_t *emu, vex_t vex, uintptr_t addr, int *step)
|
|||||||
tmp32u = VD->byte[0]; // start
|
tmp32u = VD->byte[0]; // start
|
||||||
if(rex.w) {
|
if(rex.w) {
|
||||||
GD->q[0] = ED->q[0];
|
GD->q[0] = ED->q[0];
|
||||||
if(tmp32u<64) GD->q[0] &= ~((-1LL<<tmp32u));
|
if(tmp32u<64) GD->q[0] &= ~((((uint64_t)-1)<<tmp32u));
|
||||||
CONDITIONAL_SET_FLAG((tmp32u>63), F_CF);
|
CONDITIONAL_SET_FLAG((tmp32u>63), F_CF);
|
||||||
} else {
|
} else {
|
||||||
GD->q[0] = ED->dword[0];
|
GD->q[0] = ED->dword[0];
|
||||||
if(tmp32u<32) GD->dword[0] &= ~((-1<<tmp32u));
|
if(tmp32u<32) GD->dword[0] &= ~((((uint64_t)-1)<<tmp32u));
|
||||||
CONDITIONAL_SET_FLAG((tmp32u>31), F_CF);
|
CONDITIONAL_SET_FLAG((tmp32u>31), F_CF);
|
||||||
}
|
}
|
||||||
CONDITIONAL_SET_FLAG(rex.w?(GD->q[0]==0):(GD->dword[0]==0), F_ZF);
|
CONDITIONAL_SET_FLAG(rex.w?(GD->q[0]==0):(GD->dword[0]==0), F_ZF);
|
||||||
|
@ -963,7 +963,7 @@ uintptr_t RunAVX_660F(x64emu_t *emu, vex_t vex, uintptr_t addr, int *step)
|
|||||||
switch((nextop>>3)&7) {
|
switch((nextop>>3)&7) {
|
||||||
case 2: /* VPSRLQ Vx, Ex, Ib */
|
case 2: /* VPSRLQ Vx, Ex, Ib */
|
||||||
tmp8u = F8;
|
tmp8u = F8;
|
||||||
if(tmp8u>63) VX->u128;
|
if(tmp8u>63) VX->u128 = 0;
|
||||||
else
|
else
|
||||||
{VX->q[0] = EX->q[0] >> tmp8u; VX->q[1] = EX->q[1] >> tmp8u;}
|
{VX->q[0] = EX->q[0] >> tmp8u; VX->q[1] = EX->q[1] >> tmp8u;}
|
||||||
if(vex.l) {
|
if(vex.l) {
|
||||||
|
@ -527,7 +527,7 @@ uintptr_t RunAVX_660F3A(x64emu_t *emu, vex_t vex, uintptr_t addr, int *step)
|
|||||||
tmp8u = F8;
|
tmp8u = F8;
|
||||||
if(tmp8u&1) {
|
if(tmp8u&1) {
|
||||||
GY->u128 = EX->u128;
|
GY->u128 = EX->u128;
|
||||||
if(GX!=VX);
|
if(GX!=VX)
|
||||||
GX->u128 = VX->u128;
|
GX->u128 = VX->u128;
|
||||||
} else {
|
} else {
|
||||||
GX->u128 = EX->u128;
|
GX->u128 = EX->u128;
|
||||||
@ -625,7 +625,7 @@ uintptr_t RunAVX_660F3A(x64emu_t *emu, vex_t vex, uintptr_t addr, int *step)
|
|||||||
tmp8u = F8;
|
tmp8u = F8;
|
||||||
if(tmp8u&1) {
|
if(tmp8u&1) {
|
||||||
GY->u128 = EX->u128;
|
GY->u128 = EX->u128;
|
||||||
if(GX!=VX);
|
if(GX!=VX)
|
||||||
GX->u128 = VX->u128;
|
GX->u128 = VX->u128;
|
||||||
} else {
|
} else {
|
||||||
GX->u128 = EX->u128;
|
GX->u128 = EX->u128;
|
||||||
|
@ -963,8 +963,8 @@ uintptr_t RunF0(x64emu_t *emu, rex_t rex, uintptr_t addr)
|
|||||||
case 0: if(((uintptr_t)ED)&3) {
|
case 0: if(((uintptr_t)ED)&3) {
|
||||||
// unaligned case
|
// unaligned case
|
||||||
do { tmp32u2 = native_lock_read_b(ED); tmp32u2=ED->dword[0]; tmp32u2 = add32(emu, tmp32u2, tmp64u);} while(native_lock_write_b(ED, tmp32u2)); ED->dword[0]=tmp32u2; break;
|
do { tmp32u2 = native_lock_read_b(ED); tmp32u2=ED->dword[0]; tmp32u2 = add32(emu, tmp32u2, tmp64u);} while(native_lock_write_b(ED, tmp32u2)); ED->dword[0]=tmp32u2; break;
|
||||||
} else
|
} else {
|
||||||
do { tmp32u2 = native_lock_read_d(ED); tmp32u2 = add32(emu, tmp32u2, tmp64u);} while(native_lock_write_d(ED, tmp32u2)); break;
|
do { tmp32u2 = native_lock_read_d(ED); tmp32u2 = add32(emu, tmp32u2, tmp64u);} while(native_lock_write_d(ED, tmp32u2)); break; }
|
||||||
case 1: do { tmp32u2 = native_lock_read_d(ED); tmp32u2 = or32(emu, tmp32u2, tmp64u);} while(native_lock_write_d(ED, tmp32u2)); break;
|
case 1: do { tmp32u2 = native_lock_read_d(ED); tmp32u2 = or32(emu, tmp32u2, tmp64u);} while(native_lock_write_d(ED, tmp32u2)); break;
|
||||||
case 2: do { tmp32u2 = native_lock_read_d(ED); tmp32u2 = adc32(emu, tmp32u2, tmp64u);} while(native_lock_write_d(ED, tmp32u2)); break;
|
case 2: do { tmp32u2 = native_lock_read_d(ED); tmp32u2 = adc32(emu, tmp32u2, tmp64u);} while(native_lock_write_d(ED, tmp32u2)); break;
|
||||||
case 3: do { tmp32u2 = native_lock_read_d(ED); tmp32u2 = sbb32(emu, tmp32u2, tmp64u);} while(native_lock_write_d(ED, tmp32u2)); break;
|
case 3: do { tmp32u2 = native_lock_read_d(ED); tmp32u2 = sbb32(emu, tmp32u2, tmp64u);} while(native_lock_write_d(ED, tmp32u2)); break;
|
||||||
@ -972,8 +972,8 @@ uintptr_t RunF0(x64emu_t *emu, rex_t rex, uintptr_t addr)
|
|||||||
case 5: if(((uintptr_t)ED)&3) {
|
case 5: if(((uintptr_t)ED)&3) {
|
||||||
// unaligned case
|
// unaligned case
|
||||||
do { tmp32u2 = native_lock_read_b(ED); tmp32u2=ED->dword[0]; tmp32u2 = sub32(emu, tmp32u2, tmp64u);} while(native_lock_write_b(ED, tmp32u2)); ED->dword[0]=tmp32u2; break;
|
do { tmp32u2 = native_lock_read_b(ED); tmp32u2=ED->dword[0]; tmp32u2 = sub32(emu, tmp32u2, tmp64u);} while(native_lock_write_b(ED, tmp32u2)); ED->dword[0]=tmp32u2; break;
|
||||||
} else
|
} else {
|
||||||
do { tmp32u2 = native_lock_read_d(ED); tmp32u2 = sub32(emu, tmp32u2, tmp64u);} while(native_lock_write_d(ED, tmp32u2)); break;
|
do { tmp32u2 = native_lock_read_d(ED); tmp32u2 = sub32(emu, tmp32u2, tmp64u);} while(native_lock_write_d(ED, tmp32u2)); break; }
|
||||||
case 6: do { tmp32u2 = native_lock_read_d(ED); tmp32u2 = xor32(emu, tmp32u2, tmp64u);} while(native_lock_write_d(ED, tmp32u2)); break;
|
case 6: do { tmp32u2 = native_lock_read_d(ED); tmp32u2 = xor32(emu, tmp32u2, tmp64u);} while(native_lock_write_d(ED, tmp32u2)); break;
|
||||||
case 7: cmp32(emu, ED->dword[0], tmp64u); break;
|
case 7: cmp32(emu, ED->dword[0], tmp64u); break;
|
||||||
}
|
}
|
||||||
|
@ -532,7 +532,7 @@ void adjustregs(x64emu_t* emu) {
|
|||||||
}
|
}
|
||||||
++idx;
|
++idx;
|
||||||
}
|
}
|
||||||
dynarec_log(LOG_INFO, "Checking opcode: rex=%02hhx is32bits=%d, is66=%d %02hhX %02hhX %02hhX %02hhX\n", rex.rex, rex.is32bits, is66, mem[idx+0], mem[idx+1], mem[idx+2], mem[idx+3]);
|
dynarec_log(LOG_INFO, "Checking opcode: rex=%02hhx is32bits=%d, rep=%d is66=%d %02hhX %02hhX %02hhX %02hhX\n", rex.rex, rex.is32bits, rep, is66, mem[idx+0], mem[idx+1], mem[idx+2], mem[idx+3]);
|
||||||
#ifdef DYNAREC
|
#ifdef DYNAREC
|
||||||
#ifdef ARM64
|
#ifdef ARM64
|
||||||
if(mem[idx+0]==0xA4) {
|
if(mem[idx+0]==0xA4) {
|
||||||
|
@ -99,7 +99,7 @@ uintptr_t AddBridge(bridge_t* bridge, wrapper_t w, void* fnc, int N, const char*
|
|||||||
|
|
||||||
mutex_lock(&my_context->mutex_bridge);
|
mutex_lock(&my_context->mutex_bridge);
|
||||||
b = bridge->last;
|
b = bridge->last;
|
||||||
if(b->sz == NBRICK) {
|
if(b->sz == (int)NBRICK) {
|
||||||
b->next = NewBrick(b->b);
|
b->next = NewBrick(b->b);
|
||||||
b = b->next;
|
b = b->next;
|
||||||
bridge->last = b;
|
bridge->last = b;
|
||||||
@ -202,7 +202,7 @@ uintptr_t AddVSyscall(bridge_t* bridge, int num)
|
|||||||
int sz = -1;
|
int sz = -1;
|
||||||
mutex_lock(&my_context->mutex_bridge);
|
mutex_lock(&my_context->mutex_bridge);
|
||||||
b = bridge->last;
|
b = bridge->last;
|
||||||
if(b->sz == NBRICK) {
|
if(b->sz == (int)NBRICK) {
|
||||||
b->next = NewBrick(b->b);
|
b->next = NewBrick(b->b);
|
||||||
b = b->next;
|
b = b->next;
|
||||||
bridge->last = b;
|
bridge->last = b;
|
||||||
|
@ -41,11 +41,11 @@ typedef struct my_wl_registry_listener_s {
|
|||||||
} my_wl_registry_listener_t;
|
} my_wl_registry_listener_t;
|
||||||
#define GO(A) \
|
#define GO(A) \
|
||||||
static my_wl_registry_listener_t* ref_wl_registry_listener_##A = NULL; \
|
static my_wl_registry_listener_t* ref_wl_registry_listener_##A = NULL; \
|
||||||
static void* my_wl_registry_listener_global_##A(void* a, void* b, uint32_t c, void* d, uint32_t e) \
|
static void my_wl_registry_listener_global_##A(void* a, void* b, uint32_t c, void* d, uint32_t e) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_registry_listener_##A->global, "ppupu", a, b, c, d, e); \
|
RunFunctionFmt(ref_wl_registry_listener_##A->global, "ppupu", a, b, c, d, e); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_registry_listener_global_remove_##A(void* a, void* b, uint32_t c) \
|
static void my_wl_registry_listener_global_remove_##A(void* a, void* b, uint32_t c) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_registry_listener_##A->global_remove, "ppu", a, b, c); \
|
RunFunctionFmt(ref_wl_registry_listener_##A->global_remove, "ppu", a, b, c); \
|
||||||
} \
|
} \
|
||||||
@ -74,11 +74,11 @@ typedef struct my_xdg_surface_listener_s {
|
|||||||
} my_xdg_surface_listener_t;
|
} my_xdg_surface_listener_t;
|
||||||
#define GO(A) \
|
#define GO(A) \
|
||||||
static my_xdg_surface_listener_t* ref_xdg_surface_listener_##A = NULL; \
|
static my_xdg_surface_listener_t* ref_xdg_surface_listener_##A = NULL; \
|
||||||
static void* my_xdg_surface_listener_configure_##A(void* a, void* b, int c, int d, void* e, uint32_t f) \
|
static void my_xdg_surface_listener_configure_##A(void* a, void* b, int c, int d, void* e, uint32_t f) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_xdg_surface_listener_##A->configure, "ppiipu", a, b, c, d, e, f); \
|
RunFunctionFmt(ref_xdg_surface_listener_##A->configure, "ppiipu", a, b, c, d, e, f); \
|
||||||
} \
|
} \
|
||||||
static void* my_xdg_surface_listener_close_##A(void* a, void* b) \
|
static void my_xdg_surface_listener_close_##A(void* a, void* b) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_xdg_surface_listener_##A->close, "pp", a, b); \
|
RunFunctionFmt(ref_xdg_surface_listener_##A->close, "pp", a, b); \
|
||||||
} \
|
} \
|
||||||
@ -107,11 +107,11 @@ typedef struct my_xdg_toplevel_listener_s {
|
|||||||
} my_xdg_toplevel_listener_t;
|
} my_xdg_toplevel_listener_t;
|
||||||
#define GO(A) \
|
#define GO(A) \
|
||||||
static my_xdg_toplevel_listener_t* ref_xdg_toplevel_listener_##A = NULL; \
|
static my_xdg_toplevel_listener_t* ref_xdg_toplevel_listener_##A = NULL; \
|
||||||
static void* my_xdg_toplevel_listener_configure_##A(void* a, void* b, int c, int d, void* e) \
|
static void my_xdg_toplevel_listener_configure_##A(void* a, void* b, int c, int d, void* e) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_xdg_toplevel_listener_##A->configure, "ppiip", a, b, c, d, e); \
|
RunFunctionFmt(ref_xdg_toplevel_listener_##A->configure, "ppiip", a, b, c, d, e); \
|
||||||
} \
|
} \
|
||||||
static void* my_xdg_toplevel_listener_close_##A(void* a, void* b) \
|
static void my_xdg_toplevel_listener_close_##A(void* a, void* b) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_xdg_toplevel_listener_##A->close, "pp", a, b); \
|
RunFunctionFmt(ref_xdg_toplevel_listener_##A->close, "pp", a, b); \
|
||||||
} \
|
} \
|
||||||
@ -139,7 +139,7 @@ typedef struct my_xdg_wm_base_listener_s {
|
|||||||
} my_xdg_wm_base_listener_t;
|
} my_xdg_wm_base_listener_t;
|
||||||
#define GO(A) \
|
#define GO(A) \
|
||||||
static my_xdg_wm_base_listener_t* ref_xdg_wm_base_listener_##A = NULL; \
|
static my_xdg_wm_base_listener_t* ref_xdg_wm_base_listener_##A = NULL; \
|
||||||
static void* my_xdg_wm_base_listener_ping_##A(void* a, void* b, uint32_t c) \
|
static void my_xdg_wm_base_listener_ping_##A(void* a, void* b, uint32_t c) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_xdg_wm_base_listener_##A->ping, "ppu", a, b, c); \
|
RunFunctionFmt(ref_xdg_wm_base_listener_##A->ping, "ppu", a, b, c); \
|
||||||
} \
|
} \
|
||||||
@ -166,7 +166,7 @@ typedef struct my_wl_shm_listener_s {
|
|||||||
} my_wl_shm_listener_t;
|
} my_wl_shm_listener_t;
|
||||||
#define GO(A) \
|
#define GO(A) \
|
||||||
static my_wl_shm_listener_t* ref_wl_shm_listener_##A = NULL; \
|
static my_wl_shm_listener_t* ref_wl_shm_listener_##A = NULL; \
|
||||||
static void* my_wl_shm_listener_format_##A(void* a, void* b, uint32_t c) \
|
static void my_wl_shm_listener_format_##A(void* a, void* b, uint32_t c) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_shm_listener_##A->format, "ppu", a, b, c); \
|
RunFunctionFmt(ref_wl_shm_listener_##A->format, "ppu", a, b, c); \
|
||||||
} \
|
} \
|
||||||
@ -198,27 +198,27 @@ typedef struct my_wl_output_listener_s {
|
|||||||
} my_wl_output_listener_t;
|
} my_wl_output_listener_t;
|
||||||
#define GO(A) \
|
#define GO(A) \
|
||||||
static my_wl_output_listener_t* ref_wl_output_listener_##A = NULL; \
|
static my_wl_output_listener_t* ref_wl_output_listener_##A = NULL; \
|
||||||
static void* my_wl_output_listener_geometry_##A(void* a, void* b, int c, int d, int e, int f, int g, void* h, void* i, int j)\
|
static void my_wl_output_listener_geometry_##A(void* a, void* b, int c, int d, int e, int f, int g, void* h, void* i, int j) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_output_listener_##A->geometry, "ppiiiiippi", a, b, c, d, e, f, g, h, i, j); \
|
RunFunctionFmt(ref_wl_output_listener_##A->geometry, "ppiiiiippi", a, b, c, d, e, f, g, h, i, j); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_output_listener_mode_##A(void* a, void* b, uint32_t c, int d, int e, int f) \
|
static void my_wl_output_listener_mode_##A(void* a, void* b, uint32_t c, int d, int e, int f) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_output_listener_##A->mode, "ppuiii", a, b, c, d, e, f); \
|
RunFunctionFmt(ref_wl_output_listener_##A->mode, "ppuiii", a, b, c, d, e, f); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_output_listener_done_##A(void* a, void* b) \
|
static void my_wl_output_listener_done_##A(void* a, void* b) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_output_listener_##A->done, "pp", a, b); \
|
RunFunctionFmt(ref_wl_output_listener_##A->done, "pp", a, b); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_output_listener_scale_##A(void* a, void* b, int c) \
|
static void my_wl_output_listener_scale_##A(void* a, void* b, int c) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_output_listener_##A->scale, "ppi", a, b, c); \
|
RunFunctionFmt(ref_wl_output_listener_##A->scale, "ppi", a, b, c); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_output_listener_name_##A(void* a, void* b, void* c) \
|
static void my_wl_output_listener_name_##A(void* a, void* b, void* c) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_output_listener_##A->name, "ppp", a, b, c); \
|
RunFunctionFmt(ref_wl_output_listener_##A->name, "ppp", a, b, c); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_output_listener_description_##A(void* a, void* b, void* c) \
|
static void my_wl_output_listener_description_##A(void* a, void* b, void* c) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_output_listener_##A->description, "ppp", a, b, c); \
|
RunFunctionFmt(ref_wl_output_listener_##A->description, "ppp", a, b, c); \
|
||||||
} \
|
} \
|
||||||
@ -251,11 +251,11 @@ typedef struct my_wl_seat_listener_s {
|
|||||||
} my_wl_seat_listener_t;
|
} my_wl_seat_listener_t;
|
||||||
#define GO(A) \
|
#define GO(A) \
|
||||||
static my_wl_seat_listener_t* ref_wl_seat_listener_##A = NULL; \
|
static my_wl_seat_listener_t* ref_wl_seat_listener_##A = NULL; \
|
||||||
static void* my_wl_seat_listener_capabilities_##A(void* a, void* b, uint32_t c) \
|
static void my_wl_seat_listener_capabilities_##A(void* a, void* b, uint32_t c) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_seat_listener_##A->capabilities, "ppu", a, b, c); \
|
RunFunctionFmt(ref_wl_seat_listener_##A->capabilities, "ppu", a, b, c); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_seat_listener_name_##A(void* a, void* b, void* c) \
|
static void my_wl_seat_listener_name_##A(void* a, void* b, void* c) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_seat_listener_##A->name, "ppp", a, b, c); \
|
RunFunctionFmt(ref_wl_seat_listener_##A->name, "ppp", a, b, c); \
|
||||||
} \
|
} \
|
||||||
@ -293,47 +293,47 @@ typedef struct my_wl_pointer_listener_s {
|
|||||||
} my_wl_pointer_listener_t;
|
} my_wl_pointer_listener_t;
|
||||||
#define GO(A) \
|
#define GO(A) \
|
||||||
static my_wl_pointer_listener_t* ref_wl_pointer_listener_##A = NULL; \
|
static my_wl_pointer_listener_t* ref_wl_pointer_listener_##A = NULL; \
|
||||||
static void* my_wl_pointer_listener_enter_##A(void* a, void* b, uint32_t c, void* d, int e, int f) \
|
static void my_wl_pointer_listener_enter_##A(void* a, void* b, uint32_t c, void* d, int e, int f) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_pointer_listener_##A->enter, "ppupii", a, b, c, d, e, f); \
|
RunFunctionFmt(ref_wl_pointer_listener_##A->enter, "ppupii", a, b, c, d, e, f); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_pointer_listener_leave_##A(void* a, void* b, uint32_t c, void* d) \
|
static void my_wl_pointer_listener_leave_##A(void* a, void* b, uint32_t c, void* d) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_pointer_listener_##A->leave, "ppup", a, b, c, d); \
|
RunFunctionFmt(ref_wl_pointer_listener_##A->leave, "ppup", a, b, c, d); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_pointer_listener_motion_##A(void* a, void* b, uint32_t c, int d, int e) \
|
static void my_wl_pointer_listener_motion_##A(void* a, void* b, uint32_t c, int d, int e) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_pointer_listener_##A->motion, "ppuii", a, b, c, d, e); \
|
RunFunctionFmt(ref_wl_pointer_listener_##A->motion, "ppuii", a, b, c, d, e); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_pointer_listener_button_##A(void* a, void* b, uint32_t c, uint32_t d, uint32_t e, uint32_t f)\
|
static void my_wl_pointer_listener_button_##A(void* a, void* b, uint32_t c, uint32_t d, uint32_t e, uint32_t f) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_pointer_listener_##A->button, "ppuuuu", a, b, c, d, e, f); \
|
RunFunctionFmt(ref_wl_pointer_listener_##A->button, "ppuuuu", a, b, c, d, e, f); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_pointer_listener_axis_##A(void* a, void* b, uint32_t c, uint32_t d, int e) \
|
static void my_wl_pointer_listener_axis_##A(void* a, void* b, uint32_t c, uint32_t d, int e) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_pointer_listener_##A->axis, "ppuui", a, b, c, d, e); \
|
RunFunctionFmt(ref_wl_pointer_listener_##A->axis, "ppuui", a, b, c, d, e); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_pointer_listener_frame_##A(void* a, void* b) \
|
static void my_wl_pointer_listener_frame_##A(void* a, void* b) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_pointer_listener_##A->frame, "pp", a, b); \
|
RunFunctionFmt(ref_wl_pointer_listener_##A->frame, "pp", a, b); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_pointer_listener_axis_source_##A(void* a, void* b, uint32_t c) \
|
static void my_wl_pointer_listener_axis_source_##A(void* a, void* b, uint32_t c) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_pointer_listener_##A->axis_source, "ppu", a, b, c); \
|
RunFunctionFmt(ref_wl_pointer_listener_##A->axis_source, "ppu", a, b, c); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_pointer_listener_axis_stop_##A(void* a, void* b, uint32_t c, uint32_t d) \
|
static void my_wl_pointer_listener_axis_stop_##A(void* a, void* b, uint32_t c, uint32_t d) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_pointer_listener_##A->axis_stop, "ppuu", a, b, c, d); \
|
RunFunctionFmt(ref_wl_pointer_listener_##A->axis_stop, "ppuu", a, b, c, d); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_pointer_listener_axis_discrete_##A(void* a, void* b, uint32_t c, int d) \
|
static void my_wl_pointer_listener_axis_discrete_##A(void* a, void* b, uint32_t c, int d) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_pointer_listener_##A->axis_discrete, "ppui", a, b, c, d); \
|
RunFunctionFmt(ref_wl_pointer_listener_##A->axis_discrete, "ppui", a, b, c, d); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_pointer_listener_axis_value120_##A(void* a, void* b, uint32_t c, int d) \
|
static void my_wl_pointer_listener_axis_value120_##A(void* a, void* b, uint32_t c, int d) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_pointer_listener_##A->axis_value120, "ppui", a, b, c, d); \
|
RunFunctionFmt(ref_wl_pointer_listener_##A->axis_value120, "ppui", a, b, c, d); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_pointer_listener_axis_relative_direction_##A(void* a, void* b, uint32_t c, uint32_t d)\
|
static void my_wl_pointer_listener_axis_relative_direction_##A(void* a, void* b, uint32_t c, uint32_t d) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_pointer_listener_##A->axis_relative_direction, "ppuu", a, b, c, d); \
|
RunFunctionFmt(ref_wl_pointer_listener_##A->axis_relative_direction, "ppuu", a, b, c, d); \
|
||||||
} \
|
} \
|
||||||
@ -375,27 +375,27 @@ typedef struct my_wl_keyboard_listener_s {
|
|||||||
} my_wl_keyboard_listener_t;
|
} my_wl_keyboard_listener_t;
|
||||||
#define GO(A) \
|
#define GO(A) \
|
||||||
static my_wl_keyboard_listener_t* ref_wl_keyboard_listener_##A = NULL; \
|
static my_wl_keyboard_listener_t* ref_wl_keyboard_listener_##A = NULL; \
|
||||||
static void* my_wl_keyboard_listener_keymap_##A(void* a, void* b, uint32_t c, int d, uint32_t e) \
|
static void my_wl_keyboard_listener_keymap_##A(void* a, void* b, uint32_t c, int d, uint32_t e) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_keyboard_listener_##A->keymap, "ppuiu", a, b, c, d, e); \
|
RunFunctionFmt(ref_wl_keyboard_listener_##A->keymap, "ppuiu", a, b, c, d, e); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_keyboard_listener_enter_##A(void* a, void* b, uint32_t c, void* d) \
|
static void my_wl_keyboard_listener_enter_##A(void* a, void* b, uint32_t c, void* d) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_keyboard_listener_##A->enter, "ppup", a, b, c, d); \
|
RunFunctionFmt(ref_wl_keyboard_listener_##A->enter, "ppup", a, b, c, d); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_keyboard_listener_leave_##A(void* a, void* b, uint32_t c, void* d) \
|
static void my_wl_keyboard_listener_leave_##A(void* a, void* b, uint32_t c, void* d) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_keyboard_listener_##A->leave, "ppup", a, b, c, d); \
|
RunFunctionFmt(ref_wl_keyboard_listener_##A->leave, "ppup", a, b, c, d); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_keyboard_listener_key_##A(void* a, void* b, uint32_t c, uint32_t d, uint32_t e, uint32_t f, uint32_t g)\
|
static void my_wl_keyboard_listener_key_##A(void* a, void* b, uint32_t c, uint32_t d, uint32_t e, uint32_t f, uint32_t g) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_keyboard_listener_##A->key, "ppuuuuu", a, b, c, d, e, f, g); \
|
RunFunctionFmt(ref_wl_keyboard_listener_##A->key, "ppuuuuu", a, b, c, d, e, f, g); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_keyboard_listener_modifiers_##A(void* a, void* b, uint32_t c, uint32_t d, uint32_t e, uint32_t f, uint32_t g)\
|
static void my_wl_keyboard_listener_modifiers_##A(void* a, void* b, uint32_t c, uint32_t d, uint32_t e, uint32_t f, uint32_t g) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_keyboard_listener_##A->modifiers, "ppuuuuu", a, b, c, d, e, f, g); \
|
RunFunctionFmt(ref_wl_keyboard_listener_##A->modifiers, "ppuuuuu", a, b, c, d, e, f, g); \
|
||||||
} \
|
} \
|
||||||
static void* my_wl_keyboard_listener_repeat_info_##A(void* a, void* b, int c, int d) \
|
static void my_wl_keyboard_listener_repeat_info_##A(void* a, void* b, int c, int d) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_keyboard_listener_##A->repeat_info, "ppii", a, b, c, d); \
|
RunFunctionFmt(ref_wl_keyboard_listener_##A->repeat_info, "ppii", a, b, c, d); \
|
||||||
} \
|
} \
|
||||||
@ -427,7 +427,7 @@ typedef struct my_wl_buffer_listener_s {
|
|||||||
} my_wl_buffer_listener_t;
|
} my_wl_buffer_listener_t;
|
||||||
#define GO(A) \
|
#define GO(A) \
|
||||||
static my_wl_buffer_listener_t* ref_wl_buffer_listener_##A = NULL; \
|
static my_wl_buffer_listener_t* ref_wl_buffer_listener_##A = NULL; \
|
||||||
static void* my_wl_buffer_listener_release_##A(void* a, void* b) \
|
static void my_wl_buffer_listener_release_##A(void* a, void* b) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_wl_buffer_listener_##A->release, "pp", a, b); \
|
RunFunctionFmt(ref_wl_buffer_listener_##A->release, "pp", a, b); \
|
||||||
} \
|
} \
|
||||||
@ -454,7 +454,7 @@ typedef struct my_zwp_relative_pointer_v1_listener_s {
|
|||||||
} my_zwp_relative_pointer_v1_listener_t;
|
} my_zwp_relative_pointer_v1_listener_t;
|
||||||
#define GO(A) \
|
#define GO(A) \
|
||||||
static my_zwp_relative_pointer_v1_listener_t* ref_zwp_relative_pointer_v1_listener_##A = NULL; \
|
static my_zwp_relative_pointer_v1_listener_t* ref_zwp_relative_pointer_v1_listener_##A = NULL; \
|
||||||
static void* my_zwp_relative_pointer_v1_listener_relative_motion_##A(void* a, void* b, uint32_t c, uint32_t d, int e, int f, int g, int h) \
|
static void my_zwp_relative_pointer_v1_listener_relative_motion_##A(void* a, void* b, uint32_t c, uint32_t d, int e, int f, int g, int h) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_zwp_relative_pointer_v1_listener_##A->relative_motion, "ppuuiiii", a, b, c, d, e, f, g, h); \
|
RunFunctionFmt(ref_zwp_relative_pointer_v1_listener_##A->relative_motion, "ppuuiiii", a, b, c, d, e, f, g, h); \
|
||||||
} \
|
} \
|
||||||
@ -485,23 +485,23 @@ typedef struct my_zxdg_output_v1_listener_s {
|
|||||||
} my_zxdg_output_v1_listener_t;
|
} my_zxdg_output_v1_listener_t;
|
||||||
#define GO(A) \
|
#define GO(A) \
|
||||||
static my_zxdg_output_v1_listener_t* ref_zxdg_output_v1_listener_##A = NULL; \
|
static my_zxdg_output_v1_listener_t* ref_zxdg_output_v1_listener_##A = NULL; \
|
||||||
static void* my_zxdg_output_v1_listener_logical_position_##A(void* a, void* b, int32_t c, int32_t d) \
|
static void my_zxdg_output_v1_listener_logical_position_##A(void* a, void* b, int32_t c, int32_t d) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_zxdg_output_v1_listener_##A->logical_position, "ppii", a, b, c, d); \
|
RunFunctionFmt(ref_zxdg_output_v1_listener_##A->logical_position, "ppii", a, b, c, d); \
|
||||||
} \
|
} \
|
||||||
static void* my_zxdg_output_v1_listener_logical_size_##A(void* a, void* b, int32_t c, int32_t d) \
|
static void my_zxdg_output_v1_listener_logical_size_##A(void* a, void* b, int32_t c, int32_t d) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_zxdg_output_v1_listener_##A->logical_size, "ppii", a, b, c, d); \
|
RunFunctionFmt(ref_zxdg_output_v1_listener_##A->logical_size, "ppii", a, b, c, d); \
|
||||||
} \
|
} \
|
||||||
static void* my_zxdg_output_v1_listener_done_##A(void* a, void* b) \
|
static void my_zxdg_output_v1_listener_done_##A(void* a, void* b) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_zxdg_output_v1_listener_##A->done, "pp", a, b); \
|
RunFunctionFmt(ref_zxdg_output_v1_listener_##A->done, "pp", a, b); \
|
||||||
} \
|
} \
|
||||||
static void* my_zxdg_output_v1_listener_name_##A(void* a, void* b, void* c) \
|
static void my_zxdg_output_v1_listener_name_##A(void* a, void* b, void* c) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_zxdg_output_v1_listener_##A->name, "ppp", a, b, c); \
|
RunFunctionFmt(ref_zxdg_output_v1_listener_##A->name, "ppp", a, b, c); \
|
||||||
} \
|
} \
|
||||||
static void* my_zxdg_output_v1_listener_description_##A(void* a, void* b, void* c) \
|
static void my_zxdg_output_v1_listener_description_##A(void* a, void* b, void* c) \
|
||||||
{ \
|
{ \
|
||||||
RunFunctionFmt(ref_zxdg_output_v1_listener_##A->description, "ppp", a, b, c); \
|
RunFunctionFmt(ref_zxdg_output_v1_listener_##A->description, "ppp", a, b, c); \
|
||||||
} \
|
} \
|
||||||
@ -562,4 +562,3 @@ EXPORT int my_wl_proxy_add_listener(x64emu_t* emu, void* proxy, void** l, void*
|
|||||||
}
|
}
|
||||||
|
|
||||||
#include "wrappedlib_init.h"
|
#include "wrappedlib_init.h"
|
||||||
|
|
||||||
|
Loading…
Reference in New Issue
Block a user