diff --git a/src/dynarec/arm64/dynarec_arm64_64.c b/src/dynarec/arm64/dynarec_arm64_64.c index 594bb7b52..da52b2788 100644 --- a/src/dynarec/arm64/dynarec_arm64_64.c +++ b/src/dynarec/arm64/dynarec_arm64_64.c @@ -170,6 +170,29 @@ uintptr_t dynarec64_64(dynarec_arm_t* dyn, uintptr_t addr, uintptr_t ip, int nin } break; + case 0x6F: + switch(rep) { + case 2: + INST_NAME("MOVDQU Gx,Ex");// no alignment constraint on NEON here, so same as MOVDQA + nextop = F8; + GETG; + v0 = sse_get_reg_empty(dyn, ninst, x1, gd); + if(MODREG) { + v1 = sse_get_reg(dyn, ninst, x1, (nextop&7)+(rex.b<<3)); + VMOVQ(v0, v1); + } else { + grab_segdata(dyn, addr, ninst, x4, seg); + addr = geted(dyn, addr, ninst, nextop, &ed, x1, &fixedaddress, 0xfff<<4, 15, rex, 0, 0); + ADDx_REG(x4, x4, ed); + VLDR128_U12(v0, ed, fixedaddress); + } + break; + default: + DEFAULT; + } + break; + + case 0xAF: INST_NAME("IMUL Gd, Ed"); SETFLAGS(X_ALL, SF_PENDING); diff --git a/src/emu/x64run64.c b/src/emu/x64run64.c index 07ba35906..af503324f 100644 --- a/src/emu/x64run64.c +++ b/src/emu/x64run64.c @@ -187,6 +187,20 @@ int Run64(x64emu_t *emu, rex_t rex, int seg) } break; + case 0x6F: + switch(rep) { + case 2: /* MOVDQU Gx, Ex */ + nextop = F8; + GETEX_OFFS(0, tlsdata); + GETGX; + memcpy(GX, EX, 16); // unaligned... + break; + + default: + return 1; + } + break; + case 0xAF: /* IMUL Gd,Ed */ nextop = F8; GETED_OFFS(0, tlsdata);