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https://github.com/shadergz/cosmic-station.git
synced 2024-11-23 06:09:40 +00:00
Core
: Implements test-driven corrections (1 of 5)
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61b6374a80
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@ -42,8 +42,8 @@ namespace cosmic {
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using FileStat = struct stat;
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DescriptorRaii() : hld(-1) {}
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DescriptorRaii(i32 fd, bool isManaged = false)
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: hld(fd), closeAtDestroy(!isManaged) {
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DescriptorRaii(i32 fd, bool isManaged = false) :
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hld(fd), closeAtDestroy(!isManaged) {
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if (fd != invFile)
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fstat(hld, &lastState);
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}
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@ -136,16 +136,16 @@ namespace cosmic::ee {
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cacheIndex = (mem >> 6) & 0x3f;
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cacheBank = dataCache;
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}
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Wrapper<CopCacheLine> roCache{cacheBank[cacheIndex]};
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const auto firstWayLayer{roCache->tags[0]};
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const auto secondWayLayer{roCache->tags[1]};
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CopCacheLine& roCache{cacheBank[cacheIndex]};
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const auto firstWayLayer{roCache.tags[0]};
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const auto secondWayLayer{roCache.tags[1]};
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std::array<Wrapper<u8*>, 2> maps{
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Wrapper(virtMap[firstWayLayer >> 12]),
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Wrapper(virtMap[secondWayLayer >> 12])
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std::array<u8*, 2> maps{
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virtMap[firstWayLayer >> 12],
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virtMap[secondWayLayer >> 12]
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};
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const auto firstLrf{roCache->lrf[0]};
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const auto secondLrf{roCache->lrf[1]};
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const auto firstLrf{roCache.lrf[0]};
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const auto secondLrf{roCache.lrf[1]};
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for (u32 layers{}; layers < 2; layers++) {
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if (maps[0] == virtMap[mem >> 12] && layers == 0 ? firstLrf : secondLrf)
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@ -156,15 +156,15 @@ namespace cosmic::ee {
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way == 0 ? firstWayLayer & dirtyBit : secondWayLayer & dirtyBit)};
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if (write && mode == Data && isDirty) {
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auto wrBack{(*maps[way]) + (mem & 0xfc0)};
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BitCast<u64*>(wrBack)[0] = roCache->ways[way].large[0];
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BitCast<u64*>(wrBack)[1] = roCache->ways[way].large[1];
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BitCast<u64*>(wrBack)[2] = roCache->ways[way].large[2];
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BitCast<u64*>(wrBack)[3] = roCache->ways[way].large[3];
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BitCast<u64*>(wrBack)[4] = roCache->ways[way].large[4];
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BitCast<u64*>(wrBack)[5] = roCache->ways[way].large[5];
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BitCast<u64*>(wrBack)[6] = roCache->ways[way].large[6];
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BitCast<u64*>(wrBack)[7] = roCache->ways[way].large[7];
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auto wrBack{maps[way] + (mem & 0xfc0)};
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BitCast<u64*>(wrBack)[0] = roCache.ways[way].large[0];
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BitCast<u64*>(wrBack)[1] = roCache.ways[way].large[1];
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BitCast<u64*>(wrBack)[2] = roCache.ways[way].large[2];
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BitCast<u64*>(wrBack)[3] = roCache.ways[way].large[3];
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BitCast<u64*>(wrBack)[4] = roCache.ways[way].large[4];
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BitCast<u64*>(wrBack)[5] = roCache.ways[way].large[5];
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BitCast<u64*>(wrBack)[6] = roCache.ways[way].large[6];
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BitCast<u64*>(wrBack)[7] = roCache.ways[way].large[7];
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}
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if (write) {
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// If we are writing to the cache, the dirty bit must be set
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@ -3,18 +3,16 @@
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namespace cosmic::ee {
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EeIntC::EeIntC(std::shared_ptr<EeMipsCore>& mips, std::shared_ptr<vm::Scheduler>& sq) :
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ee(mips),
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sched(sq) {
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ee(mips), sched(sq) {
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intcStat = {};
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intcMask = {};
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check0Id = sched->createSchedTick(true,
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[this](u64 unused0, bool unused1) {
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int0Check();
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});
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}
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void EeIntC::resetEeInterrupt() {
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intcStat = {};
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intcMask = {};
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check0Id = sched->createSchedTick(true, [this](u64 unused0, bool unused1) {
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int0Check();
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});
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}
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void EeIntC::raiseIrq(u8 id) {
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@ -25,6 +23,5 @@ namespace cosmic::ee {
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sched->placeTickedTask(check0Id, 0x8, {}, true);
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}
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void EeIntC::int0Check() {
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}
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}
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@ -59,8 +59,7 @@ namespace cosmic::gs {
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}
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}
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void GifBridge::update(u32 cycles) {
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if (!maskedPath3() &&
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!queueGetSize()) {
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if (!maskedPath3() && !queueGetSize()) {
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requestDmac(Gif);
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}
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while (isPathActivated(Gif) && !maskedPath3() &&
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@ -67,7 +67,7 @@ namespace cosmic::gs {
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break;
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default:
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// For some reason, the title Ridge Racer V uses the value 11 as a alias for the value 1
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ranges::for_each(gswAddrAlias, [&](auto& path) {
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ranges::for_each(gswAddrAlias, [&](const auto& path) {
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if (path.gameCase == addr) {
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gsWrite(path.rCase, data);
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}
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@ -9,9 +9,8 @@ namespace cosmic::gs {
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struct GsPayloadDataPacket {
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GsPayloadDataPacket() = default;
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GsPayloadDataPacket(u64 bufferSize)
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: downloadBuffer(bufferSize)
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{}
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GsPayloadDataPacket(u64 bufferSize) :
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downloadBuffer(bufferSize) {}
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u32 qw128Count;
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os::MappedMemory<os::vec> downloadBuffer;
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u32 indexAddr;
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@ -15,12 +15,12 @@ namespace cosmic::iop {
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switch (copId) {
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case 12: {
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std::bitset<8 * 4> bin{};
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bin[0x00] = status.iec;
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bin[0x01] = status.kuc;
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bin[0x02] = status.iep;
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bin[0x04] = status.kup;
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bin[0x03] = status.ieo;
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bin[0x05] = status.kuo;
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bin[0] = status.iec;
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bin[1] = status.kuc;
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bin[2] = status.iep;
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bin[3] = status.kup;
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bin[4] = status.ieo;
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bin[5] = status.kuo;
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bin[0x10] = status.isC;
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bin[0x16] = status.bev;
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@ -33,7 +33,7 @@ namespace cosmic::iop {
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void IoMipsCore::takeBranchIf(bool take, i32 pcAddr) {
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if (!take && !onBranch)
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return;
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i64 calcPc{static_cast<i64>(ioPc) + pcAddr};
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auto calcPc{static_cast<i64>(ioPc) + pcAddr};
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waitPc = static_cast<u32>(calcPc);
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if (waitPc & 0x3) {
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throw AppErr("Next IOP PC {:#x}: lowest 3 bits couldn't be set", waitPc);
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@ -23,29 +23,29 @@ namespace cosmic::iop {
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void IopDma::pulseSpu2Chain() {
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// When true, it means that we will write into the SPU2 device
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bool write2Spu;
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auto spu2ch{Wrapper(channels[IopSpu2])};
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auto& spu2ch{channels[IopSpu2]};
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std::array<u32, 2> packet{};
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write2Spu = spu2ch->status.isFrom2Device;
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write2Spu = spu2ch.status.isFrom2Device;
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if (spu2ch->cyclesDelay) {
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spu2ch->cyclesDelay--;
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if (spu2ch.cyclesDelay) {
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spu2ch.cyclesDelay--;
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return;
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}
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if (spu2ch->cyclesDelay <= 0) {
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if (spu2ch.cyclesDelay <= 0) {
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if (write2Spu) {
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packet[0] = ioDmaRead<u32>(spu2ch->addr);
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packet[0] = ioDmaRead<u32>(spu2ch.addr);
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spu2->writeDmaData(packet[0]);
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} else {
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packet[1] = spu2->requestDmaData();
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ioDmaWrite<u32>(spu2ch->addr, packet[1]);
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ioDmaWrite<u32>(spu2ch.addr, packet[1]);
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}
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spu2ch->size--;
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spu2ch->addr += sizeof(u32);
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spu2ch->cyclesDelay = 3;
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spu2ch.size--;
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spu2ch.addr += sizeof(u32);
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spu2ch.cyclesDelay = 3;
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}
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if (!spu2ch->size) {
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spu2ch->wordCount = 0;
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if (!spu2ch.size) {
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spu2ch.wordCount = 0;
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}
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}
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}
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@ -59,7 +59,7 @@ namespace cosmic::iop {
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}
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u32 IopIntC::readICtrl() {
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// Global interrupt disable
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const u32 ic{ctrl};
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const auto ic{ctrl};
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ctrl ^= ctrl;
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iopCheck();
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return ic;
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@ -8,8 +8,8 @@ namespace cosmic::iop {
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class IoMipsCore;
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class IopIntC {
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public:
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IopIntC(std::shared_ptr<IoMipsCore>& mips)
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: iop(mips) {}
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IopIntC(std::shared_ptr<IoMipsCore>& mips) :
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iop(mips) {}
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void iopCheck();
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void resetInterrupt();
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@ -72,15 +72,15 @@ namespace cosmic::mio {
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u32 countOfQw{};
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for (; hasOwner && highCycles > 0; ) {
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auto owner{Wrapper(channels.at(hasOwner.getId()))};
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auto& owner{channels.at(hasOwner.getId())};
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// "Owner" is the privileged channel that will use the available clock pulses at the moment
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switch (owner->index) {
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switch (owner.index) {
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case Vif0:
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countOfQw = feedVif0Pipe(*owner).first; break;
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countOfQw = feedVif0Pipe(owner).first; break;
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}
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highCycles -= std::max(countOfQw, static_cast<u32>(1));
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if (owner->isScratch)
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if (owner.isScratch)
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highCycles -= 0xc;
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if (!hasOwner)
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@ -99,14 +99,12 @@ namespace cosmic::mio {
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}
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if ((address >> 16 & 0x1000) != 0x1000) {
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throw MioErr("(DMA): Reading from an invalid address, unreachable address {}", address);
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}
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if (cid == invCid) {
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} else if (cid == invCid) {
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throw MioErr("No channel selected, very serious error...");
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}
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// For specific channels like: SifX, IpuX, SprX
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if ((address >> 4 & 0x400) == 0x400)
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cid++;
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which = address & 0xff;
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if ((address >> 12 & 0xe000) != 0xe000) {
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if (which == 0x10)
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@ -70,9 +70,7 @@ namespace cosmic::os {
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biosPath;
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OsVariable<java::JniBool> turboMode, dumpImage;
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OsVariable<java::JniInteger> schedAffinity,
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eeMode;
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OsVariable<java::JniInteger> schedAffinity, eeMode;
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private:
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[[maybe_unused]] JavaVM* androidRuntime{};
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};
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@ -51,10 +51,6 @@ namespace cosmic::vm {
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mips->cop2 = std::make_unique<vu::MacroModeCop2>(vus);
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mips->timer = std::make_unique<ee::EeTimers>(scheduler, intc);
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states->dumpImage.addListener([&]{
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dumpMemoryAtClash = *states->dumpImage;
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});
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user->success("VM loaded successfully");
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}
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@ -104,12 +100,16 @@ namespace cosmic::vm {
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vu01->vpu0Cop2.resetVu();
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vu01->vpu1Dlo.resetVu();
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states->dumpImage.addListener([&]{
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dumpMemoryAtClash = *states->dumpImage;
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});
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iop->resetIop();
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ioDma->resetIoDma();
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sound->resetSound();
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#if !defined(NDEBUG)
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// Memory is assumed to be random content by a early moment before tbe 1ft boot stage,
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// Memory is assumed to be random content by an early moment before tbe 1ft boot stage,
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// but for debugging purposes, we will cleanup everything from now (at least the EE memory)
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iop->iopMem->controller->mapped->iopSoftClean();
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iop->iopMem->controller->mapped->sndSoftClean();
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